74ACT02MTC_Q Fairchild Semiconductor, 74ACT02MTC_Q Datasheet
74ACT02MTC_Q
Manufacturer Part Number
74ACT02MTC_Q
Description
Logic Gates Qd 2-Input NOR Gate
Manufacturer
Fairchild Semiconductor
Datasheet
1.74ACT02MTC_Q.pdf
(10 pages)
Specifications of 74ACT02MTC_Q
Product
NOR
Logic Family
74ACT
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
9.5 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-14
Minimum Operating Temperature
- 40 C
Number Of Input Lines
2
Number Of Output Lines
1
©1988 Fairchild Semiconductor Corporation
74AC02, 74ACT02 Rev. 1.5.1
74AC02, 74ACT02
Quad 2-Input NOR Gate
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Description
74AC02SC
74AC02SJ
74AC02MTC
74AC02PC
74ACT02SC
74ACT02MTC
A
O
Order Number
I
Outputs source/sink 24mA
ACT02 has TTL-compatible inputs
n
n
CC
, B
All packages are lead free per JEDEC: J-STD-020B standard.
n
reduced by 50% on 74AC02 only
Pin Names
Package
Number
MTC14
MTC14
M14D
M14A
M14A
N14A
Inputs
Outputs
Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
General Description
The AC02/ACT02 contains four, 2-input NOR gates.
Logic Symbol
Package Description
IEEE/IEC
January 2008
www.fairchildsemi.com
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