CY7C1021DV33-10ZSXAT Cypress Semiconductor, CY7C1021DV33-10ZSXAT Datasheet - Page 6

• Manufacturer Part Number: CY7C1021DV33-10ZSXAT
• Description: SRAM 1-Mbit 64k x16 Static RAM
• Manufacturer: Cypress Semiconductor

Specifications of CY7C1021DV33-10ZSXAT

• Rohs: yes
• Memory Size: 1 Mbit
• Organization: 64 K x 16
• Access Time: 10 ns
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 3 V
• Maximum Operating Current: 60 mA
• Mounting Style: SMD/SMT
• Package / Case: TSOP-44
• Memory Type: Asynchronous CMOS
• Factory Pack Quantity: 1000

Document #: 38-05460 Rev. *G
Data Retention Waveform
Data Retention Characteristics
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)
Read Cycle No. 2 (OE Controlled)
Notes
V
I
t
t
11. Full device operation requires linear V
12. Device is continuously selected. OE, CE, BHE and/or BLE = V
13. WE is HIGH for Read cycle.
14. Address valid prior to or coincident with CE transition LOW.
Parameter
DATA OUT
CCDR
CDR
R
ADDRESS
CURRENT
DR
[11]
BHE, BLE
DATA OUT
ADDRESS
SUPPLY
[3]
V
V
OE
CE
CC
CE
CC
V
Data retention current
Chip deselect to data retention time
Operation recovery time
CC
for data retention
PREVIOUS DATA VALID
HIGH IMPEDANCE
Description
t
t
LZCE
PU
CC
ramp from V
t
ACE
t
t
LZBE
t
DBE
LZOE
t
[13, 14]
DOE
t
50%
OHA
t
CDR
3.0 V
Over the Operating Range
DR
to V
IL
t
CC(min.)
AA
.
V
V
CC
IN
> V
= V
> 50 s or stable at V
t
RC
[12, 13]
CC
DR
DATA RETENTION MODE
= 2.0 V, CE > V
– 0.3 V or V
t
RC
RC
V
DR
>
Conditions
CC(min.)
2 V
IN
DATA VALID
CC
< 0.3 V
> 50 s.
– 0.3 V,
Industrial
t
HZOE
DATA VALID
3.0 V
t
R
t
t
HZCE
HZBE
CY7C1021DV33
t
PD
Min.
t
RC
2
0
50%
IMPEDANCE
Max.
HIGH
3
Page 6 of 13
Unit
mA
ns
ns
V
I
I
CC
SB