70T3539MS166BC IDT, 70T3539MS166BC Datasheet - Page 18
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70T3539MS166BC
Manufacturer Part Number
70T3539MS166BC
Description
SRAM 512K X 36 STD-PWR, 2.5V DUAL PORT RAM
Manufacturer
IDT
Datasheet
1.70T3539MS133BCI.pdf
(26 pages)
Specifications of 70T3539MS166BC
Part # Aliases
IDT70T3539MS166BC
NOTES:
1. CE
2. All timing is the same for Left and Right ports.
3. Address is for internal register, not the external bus, i.e., address needs to be qualified by one of the Address counter control signals.
Truth Table III — Interrupt Flag
NOTES:
1. INT
2. CE
3. Address is for internal register, not the external bus, i.e., address needs to be qualified by one of the Address counter control signals.
Waveform of Interrupt Timing
IDT70T3539M
High-Speed 2.5V 512K x 36 Dual-Port Synchronous Static RAM
ADDRESS
ADDRESS
CLK
↑
↑
↑
↑
0 =
0 =
L
L
and INT
V
V
INT
R/W
CE
CLK
CE
IL
CLK
R/W
IL
and CE
and CE
R
R
R
L
L
R
(3)
(1)
(1)
(3)
R
R/W
L
L
R
L
X
X
H
must be initialized at power-up by Resetting the flags.
L
1 =
(2)
1 =
V
V
IH
IH
. R/W and CE are synchronous with respect to the clock and need valid set-up and hold times.
Left Port
CE
t
t
X
X
t
L
L
SW
7FFFF
SC
SA
L
(2)
t
t
t
HW
HA
HC
A
7FFFE
7FFFF
18L
t
X
X
INS
-A
0L
INT
X
X
L
H
L
CLK
(2)
↑
↑
↑
↑
(1)
R
t
SC
t
t
SW
SA
7FFFF
6.42
R/W
18
X
H
X
L
t
t
t
R
HC
HW
HA
(2)
t
INR
Right Port
CE
X
X
L
L
R
(2)
Industrial and Commercial Temperature Ranges
A
7FFFE
7FFFF
18R
X
X
-A
0R
INT
H
X
X
L
R
Set Right INT
Reset Right INT
Set Left INT
Reset Left INT
L
Function
R
Flag
L
Flag
R
Flag
5678 drw 19
Flag
5678 tbl 12