M24C01-RMN6TP STMicroelectronics, M24C01-RMN6TP Datasheet - Page 6
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M24C01-RMN6TP
Manufacturer Part Number
M24C01-RMN6TP
Description
IC EEPROM 1KBIT 400KHZ 8SOIC
Manufacturer
STMicroelectronics
Specifications of M24C01-RMN6TP
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1K (128 x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Organization
128 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
6.5 V
Density
1Kb
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
40Year
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
SOIC N
Operating Temp Range
-40C to 85C
Supply Current
0.8mA
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8629-2
M24C01-RMN6TP
M24C01-RMN6TP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M24C01-RMN6TP
Manufacturer:
ST
Quantity:
20 000
Description
1
6/38
Description
These I²C-compatible electrically erasable programmable memory (EEPROM) devices are
organized as 2048/1024/512/256/128 x 8 (M24C16, M24C08, M24C04, M24C02 and
M24C01).
Figure 1.
I²C uses a two-wire serial interface, comprising a bidirectional data line and a clock line. The
devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I²C
bus definition.
The device behaves as a slave in the I²C protocol, with all memory operations synchronized
by the serial clock. Read and Write operations are initiated by a Start condition, generated
by the bus master. The Start condition is followed by a device select code and Read/Write
bit (RW) (as described in
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
Table 2.
E0, E1, E2
SDA
SCL
WC
V
V
CC
SS
Signal name
Logic diagram
Signal names
Table
E0-E2
Chip Enable
Serial Data
Serial Clock
Write Control
Supply voltage
Ground
SCL
WC
Doc ID 5067 Rev 17
3), terminated by an acknowledge bit.
3
V CC
V SS
Function
M24Cxx
M24C16, M24C08, M24C04, M24C02, M24C01
AI02033
SDA
Input
Input/output
Input
Input
Direction
th
bit