MAX6733UTWGD6-T Maxim Integrated, MAX6733UTWGD6-T Datasheet - Page 12

• Manufacturer Part Number: MAX6733UTWGD6-T
• Description: Supervisory Circuits
• Manufacturer: Maxim Integrated
• Series: MAX6730, MAX6731, MAX6732, MAX6733, MAX6734, MAX6735r

Specifications of MAX6733UTWGD6-T

• Number Of Voltages Monitored: 2
• Monitored Voltage: 0.9 V to 5 V
• Undervoltage Threshold: 1.62 V, 1.08 V
• Overvoltage Threshold: 1.71 V, 1.14 V
• Output Type: Active Low, Push-Pull
• Manual Reset: Not Resettable
• Watchdog: Watchdog
• Battery Backup Switching: No Backup
• Power-up Reset Delay (typ): 840 ms
• Supply Voltage - Max: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-23
• Chip Enable Signals: No
• Maximum Power Dissipation: 696 mW
• Minimum Operating Temperature: - 40 C
• Power Fail Detection: No
• Supply Current (typ): 15 uA, 4 uA
• Supply Voltage - Min: 0.8 V

Single-/Dual-/Triple-Voltage µP Supervisory
Circuits with Independent Watchdog Output
Overdrive, for which reset pulses are not generated.
The graph was produced using falling V
starting above V
old by the magnitude indicated (reset threshold over-
drive). The graph shows the maximum pulse width that
a falling V
causing a reset pulse to be issued. As the amplitude of
the transient increases (i.e., goes further below the
reset threshold), the maximum allowable pulse width
decreases. A 0.1µF bypass capacitor mounted close to
V
Setting and resetting the watchdog input at different
points in the program rather than “pulsing” the watch-
dog input high-low-high or low-high-low helps the
watchdog timer closely monitor software execution.
This technique avoids a “stuck” loop, in which the
watchdog timer continues to be reset within the loop,
preventing the watchdog from timing out. Figure 6
shows an example flow diagram in which the I/O dri-
ving the watchdog input is set high at the beginning of
the program, set low at the beginning of every subrou-
tine or loop, and then set high again when the program
returns to the beginning. If the program “hangs” in any
subroutine, the I/O continually asserts low (or high),
and the watchdog timer expires, issuing a reset or
interrupt.
12
Figure 6. Watchdog Flow Diagram
CC
_ provides additional transient immunity.
______________________________________________________________________________________
Watchdog Software Considerations
CC
transient typically might have without
SUBROUTINE
COMPLETED
TH
and ending below the reset thresh-
SUBROUTINE OR
PROGRAM LOOP
SET WDI LOW
PROGRAM
SET WDI
RETURN
START
CODE
HIGH
SUBROUTINE
HANG IN
CC
_ pulses,
RSTIN
V
CC
2
V
CC
1
V
REF
V
REF
/ 2
Functional Diagram
MAX6730–
MAX6735
V
REF
CC
1
GND
TIMEOUT
PERIOD
RESET
V
CC
1
MR
V
CC
V
CC
WATCHDOG
1
OUTPUT
1
DRIVER
MR
PULLUP
RESET
TIMER
V
CC
1
V
CC
2
RST
WDO
WDI