CY7C199CN-15PXC Cypress Semiconductor Corp, CY7C199CN-15PXC Datasheet - Page 7

• Manufacturer Part Number: CY7C199CN-15PXC
• Description: IC SRAM 256KBIT 15NS 28DIP
• Manufacturer: Cypress Semiconductor Corp
• Type: Asynchronousr

Specifications of CY7C199CN-15PXC

• Memory Size: 256K (32K x 8)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Speed: 15ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Access Time: 15 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Current: 80 mA
• Organization: 32 K x 8
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: Through Hole
• Number Of Ports: 1
• Operating Supply Voltage: 5 V
• Density: 256Kb
• Access Time (max): 15ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 15b
• Package Type: PDIP
• Operating Temp Range: 0C to 70C
• Supply Current: 80mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 28
• Word Size: 8b
• Number Of Words: 32K
• Memory Configuration: 32K X 8
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: DIP
• No. Of Pins: 28
• Operating Temperature Range: 0°C To +70°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 428-2158-5; CY7C199CN-15PXC

Notes
AC Electrical Characteristics
Data Retention Characteristics
Document #: 001-06435 Rev. *E
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
V
I
t
t
4. Test Conditions are based on a transition time of 3 ns or less and timing reference levels of 1.5 V, and input pulse levels of 0 to 3.0 V.
5. At any given temperature and voltage condition, t
6. t
7. The internal memory write time is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any of these
8. L-version only.
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
Parameter
CCDR
CDR
R
Parameter
DR
signals can terminate the write. The input data setup and hold timing must be referenced to the leading edge of the signal that terminates the write.
HZOE
, t
HZCE
, t
V
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE to Data Valid
OE to Data Valid
OE to Low-Z
OE to High-Z
CE to Low-Z
CE to High-Z
CE to Power Up
CE to Power Down
Write Cycle Time
CE to Write End
Address Setup to Write End
Address Hold from Write End
Address Setup to Write Start
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z
WE HIGH to Low-Z
HZWE
CC
for Data Retention
are specified as in part (b) of the
Description
[5]
[5]
[5, 6]
[5, 6]
Description
[7]
[5, 6]
[5]
V
V
HZCE
[4]
CC
IN
≥ V
[8]
“” on page
= V
is less than t
CC
DR
– 0.3 V or V
= 2.0 V, CE ≥ V
5. Transitions are measured ± 200 mV from steady state voltage.
LZCE
, t
Condition
HZOE
Min
15
15
10
10
–
3
–
–
0
–
3
–
0
–
0
0
9
9
0
–
3
IN
is less than t
≤ 0.3 V
–15
CC
Max
– 0.3 V,
15
15
15
–
–
7
–
7
–
7
–
–
–
–
–
–
–
–
–
7
–
LZOE
, and t
Min
20
20
15
15
15
10
–
3
–
–
0
–
3
–
0
–
0
0
0
–
3
HZWE
–20
is less than t
Max
20
20
20
10
–
–
9
–
9
–
9
–
–
–
–
–
–
–
–
–
–
Min
200
2.0
–
0
Unit
LZWE
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
for any given device.
Max
150
CY7C199CN
–
–
–
Page 7 of 18
Unit
μA
ns
μs
V
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