CY6264-55SNXI Cypress Semiconductor Corp, CY6264-55SNXI Datasheet

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CY6264-55SNXI

Manufacturer Part Number
CY6264-55SNXI
Description
IC SRAM 64KBIT 55NS 28SOIC
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY6264-55SNXI

Memory Size
64K (8K x 8)
Package / Case
28-SOIC (7.5mm Width)
Format - Memory
RAM
Memory Type
SRAM
Speed
55ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Access Time
55 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
260 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Cypress Semiconductor Corporation
Document #: 001-02367 Rev. *B
Features
Logic Block Diagram
Temperature Ranges
High Speed
CMOS for optimum speed/power
Easy memory expansion with CE
TTL-compatible inputs and outputs
Automatic power-down when deselected
Available in Pb-free 28-lead SNC package
Commercial: 0°C to 70°C
Industrial: –40°C to 85°C
Automotive-A: –40°C to 85°C
55 ns
CE
CE
WE
OE
1
2
A
A
A
A
A
A
A
A
1
2
3
4
5
6
7
8
1
COLUMN DECODER
, CE
INPUT BUFFER
2
ARRAY
8K x 8
and OE features
198 Champion Court
POWER
DOWN
Functional Description
The CY6264 is a high-performance CMOS static RAM
organized as 8192 words by 8 bits. Easy memory expansion
is provided by an active LOW chip enable (CE
HIGH chip enable (CE
and three-state drivers. Both devices have an automatic
power-down feature (CE
by over 70% when deselected. The CY6264 is packaged in a
450-mil (300-mil body) SOIC.
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE
inputs are both LOW and CE
input/output pins (I/O
location addressed by the address present on the address
pins (A
selecting the device and enabling the outputs, CE
active LOW, CE
HIGH. Under these conditions, the contents of the location
addressed by the information on address pins is present on
the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH. A die coat is used to ensure alpha immunity.
0
through A
San Jose
2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
active HIGH, while WE remains inactive or
12
0
1
2
3
4
5
6
7
). Reading the device is accomplished by
0
,
2
through I/O
CA 95134-1709
), and active LOW output enable (OE)
1
8K x 8 Static RAM
), reducing the power consumption
2
is HIGH, data on the eight data
7
) is written into the memory
Revised March 24, 2010
1
), an active
408-943-2600
CY6264
1
1
and WE
and OE
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Related parts for CY6264-55SNXI

CY6264-55SNXI Summary of contents

Page 1

... LOW chip enable (CE HIGH chip enable (CE and three-state drivers. Both devices have an automatic power-down feature (CE by over 70% when deselected. The CY6264 is packaged in a 450-mil (300-mil body) SOIC. An active LOW write enable signal (WE) controls the and OE features writing/reading operation of the memory. When CE ...

Page 2

... I/O 2 GND Selection Guide Description Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Document #: 001-02367 Rev. *B SOIC Top View Range -55 55 Commercial 100 Industrial 260 Automotive-A Commercial 15 Industrial 30 Automotive-A CY6264 -70 Unit 70 ns 100 mA 200 mA 200 Page [+] Feedback ...

Page 3

... IH, Ind’l Auto > V – 0.3V, Com’ > V – 0. < 0. Ind’l Auto-A Test Conditions T = 25 MHz 5.0V CC CY6264 Ambient Temperature V CC   5V  10 +70 C   – +85 C   – +85 C -55 -70 Unit Min. Max. ...

Page 4

... Equivalent to: OUTPUT [3] -55 Min less than t for any given device. HZCE LZCE LOW, CE HIGH, and WE LOW. Both signals must be LOW to initiate a write and either 1 2 CY6264 ALL INPUT PULSES 90% 90% 10% 10% < < THEVENIN EQUIVALENT 167 1.73V -70 Unit Max. Min. Max ...

Page 5

... SUPPLY CURRENT Notes 7. Device is continuously selected. OE Address valid prior to or coincident with CE transition LOW HIGH for read cycle. 10. Data I/O is High Document #: 001-02367 Rev OHA DOE DATA VALID 50 IH CY6264 DATA VALID t HZOE t HZCE HIGH IMPEDANCE t PD ICC 50% ISB Page [+] Feedback ...

Page 6

... DATA UNDEFINED Note 11 goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 001-02367 Rev. *B [8, 10 SCE1 t SCE2 PWE t SD DATA VALID IN t HZWE HIGH IMPEDANCE SCE1 SCE2 PWE t SD DATA VALID IN t HZWE CY6264 LZWE HIGH IMPEDANCE Page [+] Feedback ...

Page 7

... TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15.0 10.0 V =4. =25°C A 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE (pF) CY6264 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 V =5. =25° 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs ...

Page 8

... Truth Table Address Designators Address Name A10 A11 A12 Document #: 001-02367 Rev. *B Input/Output X High Z Deselect/Power-Down X High Z Deselect L Data Out Read X Data In Write H High Z Deselect Address Function CY6264 Mode Pin Number Page [+] Feedback ...

Page 9

... Ordering Information Speed Package Ordering Code (ns) Diagram 55 CY6264-55SNXI 51-85092 70 CY6264-70SNXC 51-85092 CY6264-70SNXA Please contact your local Cypress sales representative for availability of these parts Package Diagram Figure 1. 28-pin (300 mil) SNC Package Outline (Narrow Body) (51-85092) Document #: 001-02367 Rev. *B Package Type 28-lead (300-mil Narrow Body) SNC (Pb-Free) ...

Page 10

... Document History Page Document Title: CY6264 Static RAM Document Number: 001-02367 Orig. of REV. ECN NO. Issue Date Change ** 384870 See ECN *A 488954 See ECN *B 2892510 See ECN Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office ...

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