M95640-WMN6T STMicroelectronics, M95640-WMN6T Datasheet - Page 12

• Manufacturer Part Number: M95640-WMN6T
• Description: IC EEPROM 64KBIT 10MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95640-WMN6T

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 64K (8K x 8)
• Speed: 10MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-1947-2

Operating features
4
4.1
4.1.1
4.1.2
4.1.3
12/48
Operating features
Supply voltage (V
Operating supply voltage V
Prior to selecting the memory and issuing instructions to it, a valid and stable V
within the specified [V
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
secure a stable DC supply voltage, it is recommended to decouple the V
suitable capacitor (usually of the order of 10 nF to 100 nF) close to the V
pins.
Device reset
In order to prevent inadvertent write operations during power-up, a power-on-reset (POR)
circuit is included. At power-up, the device does not respond to any instruction until V
reaches the internal threshold voltage (this threshold is defined in DC characteristics tables
14,
When V
●
●
●
When V
Power mode. The device must not be accessed until V
voltage within the specified [V
Power-up conditions
When the power supply is turned on, V
time, the Chip Select (S) line is not allowed to float but should follow the V
therefore recommended to connect the S line to V
Figure
In addition, the Chip Select (S) input offers a built-in safety feature, as the S input is edge-
sensitive as well as level-sensitive: after power-up, the device does not become selected
until a falling edge has first been detected on Chip Select (S). This ensures that Chip Select
(S) must have been high, prior to going low to start the first operation.
The V
defined in
15 and16
in the Standby Power mode
deselected (note that, to be executed, an instruction must be preceded by a falling
edge on Chip Select (S))
Status register values:
–
–
–
CC
3).
CC
CC
voltage has to rise continuously from 0 V up to the minimum V
the Write Enable Latch (WEL) bit is reset to 0
the Write In Progress (WIP) bit is reset to 0
the SRWD, BP1 and BP0 bits remain unchanged (non-volatile bits).
Table 9
passes over the POR threshold, the device is reset and in the following state:
passes over the POR threshold, the device is reset and enters the Standby
as V
RES
and
CC
).
Table 10
(min), V
CC
Doc ID 16877 Rev 15
CC
)
and the rise time must not vary faster than 1 V/µs.
CC
(min), V
(max)] range must be applied (see
CC
CC
CC
continuously rises from V
(max)] range defined in
M95640, M95640-W, M95640-R, M95640-DR
CC
via a suitable pull-up resistor (see
CC
reaches a valid and stable V
Table 9 andTable
SS
Table 9 andTable
to V
CC
CC
CC
CC
operating voltage
CC
W
/V
line with a
). In order to
voltage. It is
. During this
SS
CC
package
voltage
10.
CC
CC
10).