AT24HC02B-TH-B Atmel, AT24HC02B-TH-B Datasheet - Page 7

• Manufacturer Part Number: AT24HC02B-TH-B
• Description: IC EEPROM 2KBIT 1MHZ 8TSSOP
• Manufacturer: Atmel

Specifications of AT24HC02B-TH-B

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 2K (256 x 8)
• Speed: 400kHz, 1MHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-TSSOP
• Organization: 256 K x 8
• Interface Type: 2-Wire
• Maximum Clock Frequency: 0.4 MHz
• Access Time: 900 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V, 5.5 V
• Capacitance, Input: 6 pF
• Capacitance, Output: 8 pF
• Current, Input, Leakage: 0.1 μA
• Current, Operating: 0.4 mA (Read), 2 mA (Write)
• Current, Output, Leakage: 0.05
• Data Retention: 100 yrs.
• Density: 2K
• Package Type: TSSOP
• Temperature, Operating: -40 to +85 °C
• Time, Access: 0.55 μs
• Time, Fall: 300 ns
• Time, Rise: 0.3 μs
• Voltage, Input, High: 2.3 to 6 V
• Voltage, Input, Low: 0.54 to 1.65 V
• Voltage, Output, Low: 0.2 V
• Voltage, Supply: 1.8 to 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AT24HC02B-10TU-1.8; AT24HC02B-10TU-1.8

Figure 5-3.
Figure 5-4.
Figure 5-5.
Notes:
5134E–SEEPR–3/08
SCL
SDA
SDA
SDA OUT
SCL
SDA IN
1. The write cycle time t
SCL
WORDn
Software Reset
Bus Timing
Write Cycle Timing
Start bit
t
8th BIT
SU.STA
2-WIRE SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any
two-wire part can be reset by following these steps: (a) Clock up to 9 cycles, (b) Look for SDA
high in each cycle while SCL is high, (c) Create a start condition as SDA is high. The device is
ready for next communication after above steps have been completed.
1
WR
is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle.
ACK
t
HD.STA
2
t
t
F
LOW
t
AA
CONDITION
Dummy Clock Cycles
STOP
3
t
HIGH
t
HD.DAT
t
LOW
t
wr
8
(1)
t
t
SU.DAT
DH
9
CONDITION
START
Start bit
AT24HC02B
t
R
t
SU.STO
Stop bit
t
BUF
7