CY7C1360A-150BGC Cypress Semiconductor Corp, CY7C1360A-150BGC Datasheet - Page 10
![IC SRAM 9MBIT 150MHZ 119BGA](/photos/7/26/72689/cy7c1360a-150bgc_sml.jpg)
CY7C1360A-150BGC
Manufacturer Part Number
CY7C1360A-150BGC
Description
IC SRAM 9MBIT 150MHZ 119BGA
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1360A-150BGC.pdf
(28 pages)
Specifications of CY7C1360A-150BGC
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
150MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
119-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1115
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1360A-150BGC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-05258 Rev. *C
Partial Truth Table for Read/Write
Sleep Mode
The ZZ input pin is an asynchronous input. Asserting ZZ
places the SRAM in a power conservation “sleep” mode. Two
clock cycles are required to enter into or exit from this “sleep”
mode. While in this mode, data integrity is guaranteed.
Accesses pending when entering the “sleep” mode are not
ZZ Mode Electrical Characteristics
Read
Read
Write Byte 0 – DQa
Write Byte 1 – DQb
Write Bytes 1, 0
Write Byte 2 – DQc
Write Bytes 2, 0
Write Bytes 2, 1
Write Bytes 2, 1, 0
Write Byte 3 – DQd
Write Bytes 3, 0
Write Bytes 3, 1
Write Bytes 3, 1, 0
Write Bytes 3, 2
Write Bytes 3, 2, 0
Write Bytes 3, 2, 1
Write All Bytes
Write All Bytes
Read
Read
Write Byte 0 – DQ
Write Byte 1 – DQ
Write All Bytes
Write All Bytes
I
t
t
Note:
10. For the X18 product, there are only BWa and BWb.
DDZZ
ZZS
ZZREC
Parameter
Function (1360A)
Function (1362A)
[7:0]
[15:8]
and DP
and DP
Sleep mode standby current
Device operation to ZZ
ZZ recovery time
0
1
Description
GW
[10]
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
GW
BWE
1
1
1
1
1
0
X
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
considered valid nor is the completion of the operation
guaranteed. The device must be deselected prior to entering
the “sleep” mode. CEs, ADSP, and ADSC must remain
inactive for the duration of t
LOW.
Test Conditions
ZZ > V
ZZ > V
ZZ < 0.2V
BWd
DD
DD
X
X
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
BWE
– 0.2V
– 0.2V
1
0
0
0
0
X
BWc
X
X
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
2t
Min.
CYC
ZZREC
BWb
X
1
1
0
0
X
after the ZZ input returns
BWb
X
X
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
2t
Max.
10
CYC
CY7C1360A
CY7C1362A
Page 10 of 28
BWa
X
X
1
0
1
0
BWa
Unit
X
X
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
mA
ns
ns