CY7C026A-20AC Cypress Semiconductor Corp, CY7C026A-20AC Datasheet - Page 2

• Manufacturer Part Number: CY7C026A-20AC
• Description: IC SRAM 16KX16 ASYN DUAL 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C026A-20AC

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 256K (16K x 16)
• Speed: 20ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1162

Functional Description
The CY7C026A and CY7C036A are low-power CMOS 16K x
16/18 dual-port static RAMs. Various arbitration schemes are
included on the devices to handle situations when multiple pro-
cessors access the same piece of data. Two ports are provid-
ed, permitting independent, asynchronous access for reads
and writes to any location in memory. The devices can be uti-
lized as standalone 16/18-bit dual-port static RAMs or multiple
devices can be combined in order to function as a 32/36-bit or
wider master/slave dual-port static RAM. An M/S pin is provid-
ed for implementing 32/36-bit or wider memory applications
without the need for separate master and slave devices or
additional discrete logic. Application areas include interpro-
cessor/multiprocessor designs, communications status buffer-
ing, and dual-port video/graphics memory.
Pin Configurations
Document #: 38-06046 Rev. *A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
GND
VCC
VCC
NC
NC
NC
NC
NC
NC
NC
NC
10L
11L
12L
13L
14L
15L
0R
1R
2R
3R
4R
5R
6R
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
100
26
99
27
98
28
97
29
96
30
95
31
94
32
CY7C026A (16K x 16)
93
33
100-Pin TQFP (Top View)
92 91 90
34 35 36
89
37
88
38
87 86
39 40
Each port has independent control pins: Chip Enable (CE),
Read or Write Enable (R/W), and Output Enable (OE). Two
flags are provided on each port (BUSY and INT). BUSY sig-
nals that the port is trying to access the same location currently
being accessed by the other port. The Interrupt flag (INT) per-
mits communication between ports or systems by means of a
mail box. The semaphores are used to pass a flag, or token,
from one port to the other to indicate that a shared resource is
in use. The semaphore logic is comprised of eight shared
latches. Only one side can control the latch (semaphore) at
any time. Control of a semaphore indicates that a shared re-
source is in use. An automatic power-down feature is con-
trolled independently on each port by the chip enable pin.
The CY7C026A and CY7C036A are available in 100-pin Thin
Quad Plastic Flatpack (TQFP) packages.
85
41
84
42
83 82 81
43 44 45
80
46
79
47
78 77
48 49
76
50
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
NC
NC
NC
A
A
A
A
A
A
A
INT
BUSY
GND
M/S
BUSY
INT
A
A
A
A
A
A
NC
NC
NC
CY7C026A
CY7C036A
6L
5L
4L
3L
2L
1L
0L
0R
1R
2R
3R
4R
5R
L
R
L
R
Page 2 of 18