MC68HC908QY1MDW Freescale Semiconductor, MC68HC908QY1MDW Datasheet - Page 144

• Manufacturer Part Number: MC68HC908QY1MDW
• Description: 8-bit Microcontrollers - MCU 8 Bit 8MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908QY1MDW

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: HC08
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 1.5 KB
• Data Ram Size: 128 B
• On-chip Adc: No
• Operating Supply Voltage: 3.3 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: SOIC-16
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Program Memory Type: Flash
• Factory Pack Quantity: 47
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

Development Support
15.3.1.4 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
Transmit and receive baud rates must be identical.
15.3.1.5 Break Signal
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When the monitor receives a break signal,
it drives the PTA0 pin high for the duration of two bits and then echoes back the break signal.
15.3.1.6 Baud Rate
The monitor communication baud rate is controlled by the frequency of the external or internal oscillator
and the state of the appropriate pins as shown in
Table 15-1
bus frequency divided by 256 when using an external oscillator. When using the internal oscillator in
forced monitor mode, the effective baud rate is the bus frequency divided by 335.
15.3.1.7 Commands
The monitor ROM firmware uses these commands:
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READ (read memory)
WRITE (write memory)
IREAD (indexed read)
IWRITE (indexed write)
READSP (read stack pointer)
RUN (run user program)
also lists the bus frequencies to achieve standard baud rates. The effective baud rate is the
User
Monitor
Modes
START
BIT
Vector High
0
$FFFE
$FEFE
Reset
BIT 0
1
2
BIT 1
MISSING STOP BIT
3
MC68HC908QY/QT Family Data Sheet, Rev. 6
Vector Low
Figure 15-13. Monitor Data Format
Figure 15-14. Break Transaction
$FFFF
$FEFF
4
Reset
BIT 2
Table 15-2. Mode Difference
5
6
BIT 3
Vector High
7
$FEFC
$FFFC
Break
BIT 4
Table
Functions
BIT 5
15-1.
Vector Low
2-STOP BIT DELAY BEFORE ZERO ECHO
$FFFD
$FEFD
Break
BIT 6
0
1
BIT 7
2
Vector High
$FEFC
$FFFC
3
STOP
SWI
BIT
4
START
NEXT
5
BIT
6
Vector Low
Freescale Semiconductor
$FFFD
$FEFD
SWI
7