CAT24C32LI-G ON Semiconductor, CAT24C32LI-G Datasheet

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CAT24C32LI-G

Manufacturer Part Number
CAT24C32LI-G
Description
IC EEPROM 32KBIT 400KHZ 8DIP
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT24C32LI-G

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
32K (4K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Density
32Kb
Interface Type
Serial (I2C)
Organization
4Kx8
Access Time (max)
900ns
Frequency (max)
400KHz
Write Protection
Yes
Data Retention
100Year
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Package Type
PDIP
Operating Temp Range
-40C to 85C
Supply Current
2mA
Operating Supply Voltage (min)
1.7V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
8
Maximum Clock Frequency
0.1 MHz
Access Time
3500 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.7 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V , 2.5 V , 3.3 V , 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
24C32LI-G

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT24C32LI-G
Manufacturer:
ATMEL
Quantity:
5 000
CAT24C32
32-Kb I
EEPROM
Description
internally organized as 4096 words of 8 bits each.
(100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I
CAT24C32 devices on the same bus.
Features
© Semiconductor Components Industries, LLC, 2011
March, 2011 − Rev. 14
The CAT24C32 is a 32−Kb CMOS Serial EEPROM devices,
It features a 32−byte page write buffer and supports the Standard
External address pins make it possible to address up to eight
(SCL and SDA)
5−lead Package
Compliant
Supports Standard, Fast and Fast−Plus I
1.7 V to 5.5 V Supply Voltage Range
32−Byte Page Write Buffer
Hardware Write Protection for Entire Memory
Schmitt Triggers and Noise Suppression Filters on I
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
PDIP, SOIC, TSSOP, TDFN, UDFN 8−lead Packages and TSOP
This Device is Pb−Free, Halogen Free/BFR Free, and RoHS
2
C CMOS Serial
2
C Protocol
2
C protocol.
2
C Bus Inputs
1
See detailed ordering and shipping information in the package
dimensions section on page 16 of this data sheet.
CASE 751BD
CASE 646AA
W SUFFIX
L SUFFIX
SOIC−8
PDIP−8
For the location of Pin 1, please consult the
corresponding package drawing.
SDA
SCL
PDIP (L), SOIC (W), TSSOP (Y),
V
TDFN (VP2), UDFN (HU3, HU4)
ORDERING INFORMATION
V
SS
A
A
A
SS
PIN CONFIGURATIONS
0
1
2
http://onsemi.com
1
1
CASE 517AZ
CASE 948AL
TSOP−5 (TS)
HU4 SUFFIX
TS SUFFIX
CASE 483
TSSOP−8
Y SUFFIX
UDFN−8
TSOP−5
Publication Order Number:
CASE 517AX
HU3 SUFFIX
CASE 511AK
V
WP
SCL
SDA
VP2 SUFFIX
WP
V
CAT24C32/D
UDFN−8
CC
CC
TDFN−8

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CAT24C32LI-G Summary of contents

Page 1

... Supports Standard, Fast and Fast−Plus I • 1 5.5 V Supply Voltage Range • 32−Byte Page Write Buffer • Hardware Write Protection for Entire Memory • Schmitt Triggers and Noise Suppression Filters on I (SCL and SDA) • Low Power CMOS Technology • ...

Page 2

AXXX YYWWG 24C32F = Specific Device Code A = Assembly Location XXX = Last Three Digits of Assembly Lot Number YY = Production Year (Last Two Digits Production Week (Two Digits Pd-Free designator (TSSOP−8) ...

Page 3

Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Storage Temperature Voltage on any Pin with Respect to Ground (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is ...

Page 4

Table 5. A.C. CHARACTERISTICS ( −40°C to +125°C and Symbol Parameter F Clock Frequency SCL t START Condition Hold Time HD:STA t Low Period of SCL Clock LOW t ...

Page 5

Power-On Reset (POR) Each CAT24C32 incorporates Power-On Reset (POR) circuitry which protects the internal logic against powering up in the wrong state. The device will power up into Standby mode after V exceeds the POR trigger level and will CC ...

Page 6

... Slave, the Master simply repeats the request until the Slave responds with ACK. Hardware Write Protection With the WP pin held HIGH, the entire memory is protected against Write operations. If the WP pin is left floating or is grounded, it has no impact on the Write operation ...

Page 7

S BUS ACTIVITY SLAVE R MASTER ADDRESS T S SLAVE *a − a are don’t care bits 15 12 SCL SDA 8th Bit Byte n BUS ACTIVITY SLAVE ADDRESS MASTER R ADDRESS BYTE T S ...

Page 8

... If, after receiving data sent by the Slave, the Master responds with ACK, then the Slave will continue transmitting until the Master responds with NoACK followed by STOP (Figure 12). During Sequential Read the internal byte address is automatically incremented up to the end of memory, where it then wraps around to the beginning of memory ...

Page 9

PIN # 1 IDENTIFICATION D TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA−01 ISSUE A SYMBOL ...

Page 10

PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...

Page 11

E1 e TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O SYMBOL MIN A A1 0.05 A2 ...

Page 12

D E PIN #1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.45 0.50 A1 0.00 0.02 A3 0.127 REF b 0.20 0.25 D 1.95 2.00 D2 1.35 1.40 E 2.95 3.00 E2 1.25 1.30 e 0.50 REF L 0.25 ...

Page 13

D E PIN#1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A2 0.45 0.55 A3 0.20 REF b 0.20 0.25 D 1.90 2.00 D2 1.30 1.40 E 2.90 3.00 E2 1.20 1.30 e 0.50 TYP ...

Page 14

D E PIN #1 INDEX AREA TOP VIEW SYMBOL MIN NOM A 0.45 0.50 A1 0.00 0.02 A3 0.127 REF b 0.20 0.25 D 1.90 2.00 D2 1.50 1.60 E 2.90 3.00 E2 0.10 0.20 e 0.50 TYP K 0.10 ...

Page 15

... T SOLDERING FOOTPRINT* 1.9 0.074 0.95 0.037 1.0 0.039 0.7 0.028 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSOP−5 CASE 483−02 ISSUE H 0. DETAIL Z DETAIL ...

Page 16

... The device used in the above example is a CAT24C32YI−GT3 (TSSOP, Industrial Temperature, NiPdAu, Tape & Reel, 3,000/Reel). 14. For additional package and temperature options, please contact your nearest ON Semiconductor Sales office. 15. The TDFN 0.75 mm (VP2) and UDFN 0.5 mm (HU3) are not recommended for new design. Please replace with UDFN ...

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