AT25320B-SSHL-T Atmel, AT25320B-SSHL-T Datasheet - Page 7
![IC EEPROM 32KBIT 20MHZ 8SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
AT25320B-SSHL-T
Manufacturer Part Number
AT25320B-SSHL-T
Description
IC EEPROM 32KBIT 20MHZ 8SOIC
Manufacturer
Atmel
Datasheet
1.AT25320B-SSHL-B.pdf
(26 pages)
Specifications of AT25320B-SSHL-T
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
32K (4K x 8)
Speed
5MHz, 10MHz, 20MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Density
32Kb
Interface Type
Serial (SPI)
Organization
4Kx8
Access Time (max)
80ns
Frequency (max)
5MHz
Write Protection
Yes
Data Retention
100Year
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
SOIC
Operating Temp Range
-40C to 85C
Supply Current
10mA
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT25320B-SSHL-T
Manufacturer:
ATMEL
Quantity:
4 000
Company:
Part Number:
AT25320B-SSHL-T
Manufacturer:
ATMEL
Quantity:
321
Part Number:
AT25320B-SSHL-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8535F–SEEPR–6/10
3.
Functional Description
The Atmel
of the 6805 and 68HC11 series of microcontrollers.
The AT25320B/640B utilizes an 8-bit instruction register. The list of instructions and their operation codes are con-
tained in
low CS transition.
Table 3-1.
WRITE ENABLE (WREN): The device will power up in the write disable state when V
ming instructions must therefore be preceded by a Write Enable instruction.
WRITE DISABLE (WRDI): To protect the device against inadvertent writes, the Write Disable instruction disables
all programming modes. The WRDI instruction is independent of the status of the WP pin.
READ STATUS REGISTER (RDSR): The Read Status Register instruction provides access to the status register.
The READY/BUSY and Write Enable status of the device can be determined by the RDSR instruction. Similarly,
the Block Write Protection Bits indicate the extent of protection employed. These bits are set by using the WRSR
instruction.
Table 3-2.
Table 3-3.
Instruction Name
WREN
WRDI
RDSR
WRSR
READ
WRITE
Bit
Bit 0 (RDY)
Bit 1 (WEN)
Bit 2 (BP0)
Bit 3 (BP1)
Bits 4–6 are “0”s when device is not in an internal write cycle.
Bit 7 (WPEN)
Bits 0–7 are “1”s during an internal write cycle.
WPEN
Bit 7
Table
®
AT25320B/640B is designed to interface directly with the synchronous serial peripheral interface (SPI)
Instruction Set for the Atmel AT25320B/640B
Read Status Register Bit Definition
Status Register Format
3-1. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-
Bit 6
X
Definition
Bit 0 = “0” (RDY) indicates the device is READY. Bit 0 = “1” indicates the write cycle
is in progress.
Bit 1= “0” indicates the device is not WRITE ENABLED. Bit 1 = “1” indicates the
device is write enabled.
See
See
See
Table 3-4 on page
Table 3-4 on page
Table 3-5 on page
Instruction Format
0000 X110
0000 X100
0000 X101
0000 X001
0000 X011
0000 X010
Bit 5
X
Bit 4
X
8.
8.
8.
Bit 3
BP1
Operation
Set Write Enable Latch
Reset Write Enable Latch
Read Status Register
Write Status Register
Read Data from Memory Array
Write Data to Memory Array
Bit 2
BP0
Atmel AT25320B/640B
WEN
Bit 1
Bit 0
RDY
CC
is applied. All program-
7