AT25320B ATMEL [ATMEL Corporation], AT25320B Datasheet

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AT25320B

Manufacturer Part Number
AT25320B
Description
SPI Serial EEPROMs 32K (4096 x 8) 64K (8192 x 8)
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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Features
Description
The AT25320B/640B provides 32768/65536 bits of serial electrically-erasable pro-
grammable read-only memory (EEPROM) organized as 4096/8192 words of 8 bits
each. The device is optimized for use in many industrial and commercial applications
where low-power and low-voltage operation are essential. The AT25320B/640B is
available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-
MAP (MLP 2x3),
packages.
The AT25320B/640B is enabled through the Chip Select pin (CS) and accessed via a
three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and
Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa-
rate erase cycle is required before write.
Table 0-1.
Pin Name
CS
SCK
SI
SO
GND
VCC
WP
HOLD
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
Low-voltage and Standard-voltage Operation
20 MHz Clock Rate (5V)
32-byte Page Mode
Block Write Protection
Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software
Data Protection
Self-timed Write Cycle (5 ms max)
High Reliability
Automotive Devices Available
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 8-lead
TSSOP and 8-lead Ultra Lead Frame Land Grid Array (ULA) Packages
Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
– Datasheet Describes Mode 0 Operation
– 1.8 (V
– Protect 1/4, 1/2, or Entire Array
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
CC
= 1.8V to 5.5V)
Pin Configuration
8-lead Ultra Lead Frame Land Grid Array (ULA)
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
GND
GND
WP
WP
SO
SO
CS
CS
8-lead TSSOP
8-lead PDIP
1
2
3
4
1
2
3
4
and 8-lead TSSOP
8
7
6
5
8
7
6
5
VCC
HOLD
SCK
SI
VCC
HOLD
SCK
SI
SPI Serial
EEPROMs
32K (4096 x 8)
64K (8192 x 8)
AT25320B
AT25640B
Advance
Information
8535B–SEEPR–7/08

Related parts for AT25320B

AT25320B Summary of contents

Page 1

... Ultra Lead Frame Land Grid Array (ULA) packages. The AT25320B/640B is enabled through the Chip Select pin (CS) and accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no sepa- rate erase cycle is required before write ...

Page 2

... Absolute Maximum Ratings* Operating Temperature..................................–55°C to +125°C Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA AT25320B/640B 2 8-lead Ultra Thin Mini-MAP (MLP 2x3) 8-lead SOIC VCC 1 8 VCC ...

Page 3

... Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (SO) OUT C Input Capacitance (CS, SCK, SI, WP, HOLD) IN Note: 1. This parameter is characterized and is not 100% tested. 8535B–SEEPR–7/08 Block Diagram = 25° 1.0 MHz AT25320B/640B = +5.0V (unless otherwise noted) CC Max Units Conditions OUT ...

Page 4

... Output Low-voltage OL2 V Output High-voltage OH2 Notes min and V max are reference only and are not tested Worst case measured at 85°C AT25320B/640B 4 = 40°C to +85°C, V – AI Test Condition MHz Open, Read 5. MHz Open, Read, ...

Page 5

... AT25320B/640B Max Units 20 10 MHz µ µ ...

Page 6

... AT25320B/640B, and the serial output pin (SO) will remain in a high impedance state until the falling edge detected again. This will reinitialize the serial communication. CHIP SELECT: The AT25320B/640B is selected when the CS pin is low. When the device is not selected, data will not be accepted via the SI pin, and the serial output pin (SO) will remain in a high impedance state ...

Page 7

... The WP pin function is blocked when the WPEN bit in the status register is “0”. This will allow the user to install the AT25320B/640B in a system with the WP pin tied to ground and still be able to write to the status register. All WP pin functions are enabled when the WPEN bit is set to “ ...

Page 8

... Bits 0–7 are “1”s during an internal write cycle. WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protection. The AT25320B/640B is divided into four array segments. One-quarter, one-half, or all of the memory segments can be protected. Any of the data within any selected segment will therefore be read only ...

Page 9

... X X READ SEQUENCE (READ): Reading the AT25320B/640B via the Serial Output (SO) pin requires the following sequence. After the CS line is pulled low to select a device, the read op- code is transmitted via the SI line followed by the byte address to be read (A15 6). Upon completion, any data on the SI line will be ignored. The data (D7 address is then shifted out onto the SO line ...

Page 10

... If Bit 0 = “1”, the write cycle is still in progress. If Bit 0 = “0”, the write cycle has ended. Only the RDSR instruction is enabled during the write programming cycle. The AT25320B/640B is capable of a 32-byte page write operation. After each byte of data is received, the five low-order address bits are internally incremented by one; the high-order bits of the address will remain constant ...

Page 11

... Figure 3-2. WREN Timing Figure 3-3. WRDI Timing Figure 3-4. RDSR Timing SCK INSTRUCTION SI HIGH IMPEDANCE SO 8535B–SEEPR–7/ MSB AT25320B/640B DATA OUT ...

Page 12

... SI HIGH IMPEDANCE SO Figure 3-6. READ Timing SCK SI INSTRUCTION HIGH IMPEDANCE SO Figure 3-7. WRITE Timing SCK INSTRUCTION SI HIGH IMPEDANCE SO AT25320B/640B BYTE ADDRESS ... ...

Page 13

... Figure 3-8. HOLD Timing CS SCK HOLD SO 8535B–SEEPR–7/ AT25320B/640B ...

Page 14

... AT25320B Ordering Information Ordering Code AT25320B-PU (Bulk form only) (1) AT25320BN-SH-B (NiPdAu Lead Finish) (2) AT25320BN-SH-T (NiPdAu Lead Finish) (1) AT25320B-TH-B (NiPdAu Lead Finish) (2) AT25320B-TH-T (NiPdAu Lead Finish) (2) AT25320BY6-YH-T (NiPdAu Lead Finish) (2) AT25320BD3-DH-T (NiPdAu Lead Finish) (2) AT25320BU2-UU-T (NiPdAu Lead Finish) (3) AT25320B-W-11 Notes: 1. “B” denotes bulk. ...

Page 15

... Body, 0.75 mm Pitch, VFBGA Package (dBGA2) −1.8 Low Voltage (1.8 to 5.5V) 8535B–SEEPR–7/08 Voltage Package 1.8 8P3 1.8 8S1 1.8 8S1 1.8 8A2 1.8 8A2 1.8 8Y6 1.8 8D3 1.8 8U2-1 1.8 Die Sale Package Type Options AT25320B/640B Operation Range Lead-free/Halogen-free/ Industrial Temperature (−40 to 85°C) Industrial Temperature (−40 to 85°C) 15 ...

Page 16

... E and eA measured with the leads constrained to be perpendicular to datum. 5. Pointed or rounded lead tips are preferred to ease insertion and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm). 2325 Orchard Parkway San Jose, CA 95131 R AT25320B/640B ...

Page 17

... E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 8535B–SEEPR–7/ Top View TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT25320B/640B ∅ End View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 1.35 – ...

Page 18

... Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07 mm. 5. Dimension D and determined at Datum Plane H. 2325 Orchard Parkway San Jose, CA 95131 R AT25320B/640B TITLE 8A2, 8-lead, 4 ...

Page 19

... Pin 1 Pin 1 Index Index Area Area TITLE 8Y6, 8-lead 2.0 x 3.0 mm Body, 0.50 mm Pitch, Utlra Thin Mini-Map, Dual No Lead Package (DFN) ,(MLP 2x3) AT25320B/640B (6X) e (6X 1.50 REF. 1.50 REF. COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX D 2 ...

Page 20

... ULA PIN # TOP VIEW 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT25320B/640B SIDE VIEW SYMBOL TITLE 8D3, 8-lead (1.80 x 2.20 mm Body) Ultra Leadframe Land Grid Array (ULA PIN # BOTTOM VIEW ...

Page 21

... This drawing is for general information. 2. Dimension 'b' is measured at the maximum solder ball diameter. 3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu. Package Drawing Contact: packagedrawings@atmel.com 8535B–SEEPR–7/08 TITLE 8U2-1, 8 ball, 2.35 x 3.73 mm Body, 0.75 mm pitch VFBGA Package (dBGA2) AT25320B/640B COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 0.81 ...

Page 22

... Revision History Doc. Rev. 8535B 8535A AT25320B/640B 22 Date Comments 7/2008 Modified ‘Endurance’ parameter on page 6 4/2008 Initial document release. 8535B–SEEPR–7/08 ...

Page 23

Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...

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