24AA64-I/SN Microchip Technology, 24AA64-I/SN Datasheet - Page 6

• Manufacturer Part Number: 24AA64-I/SN
• Description: IC EEPROM 64KBIT 400KHZ 8SOIC
• Manufacturer: Microchip Technology

Specifications of 24AA64-I/SN

• Memory Size: 64K (8K x 8)
• Package / Case: 8-SOIC (3.9mm Width)
• Operating Temperature: -40°C ~ 85°C
• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Speed: 100kHz, 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 1.7 V ~ 5.5 V
• Organization: 8 K x 8
• Interface Type: I2C
• Maximum Clock Frequency: 0.4 MHz
• Access Time: 5 ms
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.7 V
• Maximum Operating Current: 3 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 1.8 V, 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 24AA64I/SN

24AA64/24LC64
3.6
A control byte is the first byte received following the
Start condition from the master device (Figure 3-2).
The control byte consists of a four-bit control code. For
the 24XX64, this is set as ‘1010’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
bits allow the use of up to eight 24XX64 devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are, in effect, the three Most Significant bits of the word
address.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’, a read operation is
selected. When set to a ‘0’, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 3-3). Because
only A12...A0 are used, the upper-three address bits
are don’t care bits. The upper-address bits are
transferred first, followed by the less significant bits.
Following the Start condition, the 24XX64 monitors the
SDA bus, checking the device-type identifier being
transmitted. Upon receiving a ‘1010’ code and appro-
priate device-select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX64 will select a read or
write operation.
FIGURE 3-3:
DS21189H-page 6
1
CONTROL
Device Addressing
CODE
0
CONTROL BYTE
1
0
A
2
ADDRESS SEQUENCE BIT ASSIGNMENTS
SELECT
CHIP-
BITS
A
1
A
0 R/W
X
ADDRESS HIGH BYTE
X
X
12
A
11
A
FIGURE 3-2:
3.7
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 512K
bits by adding up to eight 24XX64's on the same bus.
In this case, software can use A0 of the control byte as
address bit A13, A1 as address bit A14 and A2 as
address bit A15. It is not possible to sequentially read
across device boundaries.
10
A
Start Bit
A
9
S
A
8
Contiguous Addressing Across
Multiple Devices
1
Control Code
0
A
7
Slave Address
1
ADDRESS LOW BYTE
•
CONTROL BYTE FORMAT
 2003 Microchip Technology Inc.
0
•
Read/Write Bit
A2
Chip Select
•
Acknowledge Bit
Bits
•
A1
X = Don’t Care Bit
•
A0
•
R/W
A
0
ACK