AT25DF321A-SH-B Atmel, AT25DF321A-SH-B Datasheet - Page 38

• Manufacturer Part Number: AT25DF321A-SH-B
• Description: IC FLASH 32MBIT 100MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT25DF321A-SH-B

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 32M (16384 pages x 256 Bytes)
• Speed: 100MHz
• Interface: SPI, RapidS
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Memory Configuration: 16384 Pages X 256 Bytes
• Interface Type: Serial, SPI
• Clock Frequency: 100MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 12-2. Read Manufacturer and Device ID
CS
0
6
7
8
14
15
16
22
23
24
30
31
32
38
SCK
OPCODE
SI
9Fh
HIGH-IMPEDANCE
SO
1Fh
47h
01h
00h
MANUFACTURER ID
DEVICE ID
DEVICE ID
EXTENDED
BYTE 1
BYTE 2
DEVICE
INFORMATION
STRING LENGTH
Note: Each transition
shown for SI and SO represents one byte (8 bits)
12.3
Deep Power-Down
During normal operation, the device will be placed in the standby mode to consume less power as long as the CS pin
remains deasserted and no internal operation is in progress. The Deep Power-Down command offers the ability to place
the device into an even lower power consumption state called the Deep Power-Down mode.
When the device is in the Deep Power-Down mode, all commands including the Read Status Register command will be
ignored with the exception of the Resume from Deep Power-Down command. Since all commands will be ignored, the
mode can be used as an extra protection mechanism against program and erase operations.
Entering the Deep Power-Down mode is accomplished by simply asserting the CS pin, clocking in the opcode of B9h, and
then deasserting the CS pin. Any additional data clocked into the device after the opcode will be ignored. When the CS pin
is deasserted, the device will enter the Deep Power-Down mode within the maximum time of t
.
EDPD
The complete opcode must be clocked in before the CS pin is deasserted, and the CS pin must be deasserted on an even
byte boundary (multiples of eight bits); otherwise, the device will abort the operation and return to the standby mode
once the CS pin is deasserted. In addition, the device will default to the standby mode after a power-cycle.
The Deep Power-Down command will be ignored if an internally self-timed operation such as a program or erase cycle is
in progress. The Deep Power-Down command must be reissued after the internally self-timed operation has been
completed in order for the device to enter the Deep Power-Down mode.
Atmel AT25DF321A
38
3686D–DFLASH–12/09