CY8CKIT-050B Cypress Semiconductor, CY8CKIT-050B Datasheet - Page 43
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CY8CKIT-050B
Manufacturer Part Number
CY8CKIT-050B
Description
Development Boards & Kits - ARM PSoC 5LP Development Kit
Manufacturer
Cypress Semiconductor
Datasheet
1.CY8CKIT-050B.pdf
(62 pages)
Specifications of CY8CKIT-050B
Rohs
yes
Product
Development Kits
Tool Is For Evaluation Of
PSoC 5LP
Core
ARM Cortex M3
Interface Type
RS-232, USB
Operating Supply Voltage
9 V/12 V
A.1
CY8CKIT-050 PSoC® 5LP Development Kit Guide, Doc. # 001-65816 Rev. *E
A.
Appendix
Schematic
+9V/+12V, 1A
BH2
BH2
BH1
BH1
9V Battery
Terminals
POWER JACK P-5
POWER JACK P-5
J4
J4
9V
9V
VSSB
BAT 9V FEMALE
BAT 9V FEMALE
BAT 9V MALE
BAT 9V MALE
NO LOAD
NEG2
NEG1
NEG3
POS2
POS1
POS3
Internal Boost Regulator
R1
R1
1
3
2
2
GND
Note: Load R1,R28 and Un-Load R27 for low power application
VBAT
2
1
3
2
1
3
GND
D3
D3
D-64
D-64
GND
SS12-E3/61T
SS12-E3/61T
Note: Load R30 when either
Analog and Digital regulator required
VDDA
1
VSSD
0402
0402
GND
2
C3
C3
3216
3216
0.1 uFd
0.1 uFd
0805
0805
ZERO
ZERO
VSSA
+
+
10 uFd 16v
10 uFd 16v
RED
RED
GND
VBAT
R30
R30
TP2
TP2
C5
C5
1210
1210
D4
D4
GND
NO LOAD
VDDD
1
C6
C6
22 uFd
22 uFd
10V
10V
VIN
C4
C4
L1
L1
22 uH
22 uH
3216
3216
V5.0
3216
3216
7032
7032
8
5
+
+
+
+
10 uFd 16v
10 uFd 16v
2
GND
GND
VSSD
C2
C2
10 uFd 16v
10 uFd 16v
U1
U1
NO LOAD
IN
nSHDN
R57
R57
0805
0805
ZERO
ZERO
3
5V/3.3V/0.5A LDO
5.0V/1A LDO
LT1763CS8
LT1763CS8
TO-252
TO-252
U2
U2
VIN
VSSA
NO LOAD
1
Note: Load R25, R29 and R31 for operating the device on Boost
GND
R29
R29
GND
SENSE
AP1117D50G
AP1117D50G
3.3V/0.8A LDO
SOT23
SOT23
ZHCS
ZHCS
OUT
Byp
D6
D6
3
1
GND
VOUT
LM1117MPX-3.3
LM1117MPX-3.3
SOT-223
SOT-223
U4
U4
NO LOAD
VIN
GND
BLACK
BLACK
1
2
4
V5.0
R25
R25
TP1
TP1
330 ohm
330 ohm
D5
D5
2
R15
R15
VSSD
VDDA
GND
VOUT
C14
C14
TAB
0402
0402
VSSD
3216
3216
Note:
For 5V: J11-3 to J11-2,
For 3.3V: J11-2 to J11-1,
For 5V Analog,3.3V Digital: J11-3 to J11-2, J10-2 to J10-1
22 uFd
22 uFd
0.1 uFd
0.1 uFd
SENSE
C17
C17
VDDD
10V
10V
+
+
2
2
4
R24
R24
C22
C22
ZERO
ZERO
VSSA
0805
0805
NO LOAD
TP3 RED
TP3 RED
1210
1210
NO LOAD
NO LOAD
R31
R31
TP4 RED
TP4 RED
R12
R12
3.16K
3.16K
ZERO
ZERO
R11
R11
1K
1K
R26
R26
VSSB
1
VSSD
V5.0
3216
3216
V3.3
0402
0402
+
+
1
R13
R13
3.74K
3.74K
C15
C15
10 uFd 16v
10 uFd 16v
C23
C23
ZERO
ZERO
0.1 uFd
0.1 uFd
VDDA_P
R27
R27
0805
0805
VSSA
ZERO
ZERO
2
J10-3 to J10-2
R23
R23
J10-2 to J10-1
3216
3216
VDDA
NO LOAD
J11
J11
+
+
R28
R28
C13
C13
J33
J33
Power Supply
VDDA_P
RED
VDDD
V5.0
J10
J10
VDDD
VDDA
V3.3
1
2
3
NO LOAD
J38
J38
1
2
3
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