EVAL-ADXL343Z Analog Devices, EVAL-ADXL343Z Datasheet - Page 16

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EVAL-ADXL343Z

Manufacturer Part Number
EVAL-ADXL343Z
Description
Daughter Cards & OEM Boards EB
Manufacturer
Analog Devices
Series
ADXL343r
Datasheet

Specifications of EVAL-ADXL343Z

Rohs
yes
Product
Breakout Boards
Description/function
3 axis accelerometer evaluation board
Interface Type
I2C, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2 V to 3.6 V
Factory Pack Quantity
1
For Use With
ADXL343
ADXL343
I
With CS tied high to V
requiring a simple 2-wire connection, as shown in Figure 30.
The
and User Manual, Rev. 03—19 June 2007, available from NXP
Semiconductor. It supports standard (100 kHz) and fast (400 kHz)
data transfer modes if the bus parameters given in Table 11
and Table 12 are met. Single- or multiple-byte reads/writes are
supported, as shown in Figure 31. With the ALT ADDRESS pin
high, the 7-bit I
the R/ W bit. This translates to 0x3A for a write and 0x3B for a
read. An alternate I
can be chosen by grounding the ALT ADDRESS pin (Pin 12).
This translates to 0xA6 for a write and 0xA7 for a read.
There are no internal pull-up or pull-down resistors for any
unused pins; therefore, there is no known state or default state
for the CS or ALT ADDRESS pin if left floating or unconnected.
It is required that the CS pin be connected to V
the ALT ADDRESS pin be connected to either V
when using I
Table 11. I
Parameter
Digital Input
Low Level Input Voltage (V
High Level Input Voltage (V
Low Level Input Current (I
High Level Input Current (I
Digital Output
Low Level Output Voltage (V
Low Level Output Current (I
Pin Capacitance
1
2
Limits based on characterization results; not production tested.
C
ADXL343
1
NOTES
1. THE SHADED AREAS REPRESENT WHEN THE DEVICE IS LISTENING.
SINGLE-BYTE WRITE
MASTER START
SLAVE
MULTIPLE-BYTE WRITE
MASTER START
SLAVE
SINGLE-BYTE READ
MASTER START
SLAVE
MULTIPLE-BYTE READ
MASTER START
SLAVE
THIS START IS EITHER A RESTART OR A STOP FOLLOWED BY A START.
2
C Digital Input/Output
2
C.
conforms to the UM10204 I
2
C address for the device is 0x1D, followed by
SLAVE ADDRESS + WRITE
SLAVE ADDRESS + WRITE
SLAVE ADDRESS + WRITE
SLAVE ADDRESS + WRITE
2
C address of 0x53 (followed by the R/ W bit)
DD I/O
IL
IH
IL
)
IH
OL
)
)
, the
OL
)
)
)
ADXL343
ACK
ACK
ACK
ACK
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
REGISTER ADDRESS
2
is in I
C-Bus Specification
DD I/O
2
DD I/O
C mode,
and that
Test Conditions
V
V
V
V
V
f
or GND
IN
ACK
ACK
ACK
ACK
IN
IN
DD I/O
DD I/O
OL
Figure 31. I
= 1 MHz, V
= V
= 0 V
= V
START
START
< 2 V, I
≥ 2 V, I
DD I/O
OL, max
Rev. 0 | Page 16 of 36
1
1
SLAVE ADDRESS + READ
SLAVE ADDRESS + READ
DATA
DATA
2
OL
OL
C Device Addressing
IN
= 3 mA
= 3 mA
= 2.5 V
Due to communication speed limitations, the maximum output
data rate when using 400 kHz I
with a change in the I
using I
Operation at an output data rate above the recommended maxi-
mum may result in undesirable effect on the acceleration data,
including missing samples or additional noise.
If other devices are connected to the same I
operating voltage level of these other devices cannot exceed V
by more than 0.3 V. External pull-up resistors, R
proper I
and User Manual, Rev. 03—19 June 2007, when selecting pull-up
resistor values to ensure proper operation.
ACK
ACK
STOP
ACK
ACK
2
C at 100 kHz limits the maximum ODR to 200 Hz.
2
C operation. Refer to the UM10204 I
DATA
Figure 30. I
ALT ADDRESS
ADXL343
Min
0.7 × V
−0.1
3
DATA
DATA
SDA
SCL
2
CS
C Connection Diagram (Address 0x53)
ACK
2
C communication speed. For example,
DD I/O
STOP
NACK
R
ACK
V
P
DD I/O
2
Limit
C is 800 Hz and scales linearly
STOP
R
Max
0.3 × V
0.1
0.2 × V
400
8
P
1
DATA
PROCESSOR
D IN/OUT
D OUT
DD I/O
DD I/O
2
C bus, the nominal
2
C-Bus Specification
P
, are necessary for
Data Sheet
NACK
STOP
Unit
V
V
µA
µA
V
mV
mA
pF
DD I/O

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