PI3VDP411LSAZBEX Pericom, PI3VDP411LSAZBEX Datasheet

no-image

PI3VDP411LSAZBEX

Manufacturer Part Number
PI3VDP411LSAZBEX
Description
Video IC Development Tools Dual Mde DisplayPort TMDS Electricl brdge
Manufacturer
Pericom
Datasheet

Specifications of PI3VDP411LSAZBEX

Rohs
yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI3VDP411LSAZBEX
Manufacturer:
PERICOM
Quantity:
20 000
Features
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Converts low-swing AC coupled differential input to
HDMI Level shifting operation up to 2.5Gbps per lane
Integrated 50-ohm termination resistors for AC-coupled
Provide Output Squelch function to turn off TMDS
Enable/Disable feature to turn off TMDS outputs to enter
Output slew rate control on TMDS outputs to minimize
Integrated Active / Passive DDC level shifters (3.3V source
Transparent operation: no re-timing or configuration
Level shifter for HPD signal from HDMI/DVI connector
Integrated pull-down on HPD_SINK input guarantees
3.3V Power supply required
TMDS output enable control
ESD protection on all I/O pins
Packaging (Pb-free & Green available):
HDMI™ rev 1.3 compliant open-drain current steering Rx
terminated differential output
(250MHz pixel clock)
differential inputs.
common mode output buffer when TMDS clock is not
present
low-power state.
EMI
to 5V sink)
required
"input low" when no display is plugged in
à 4kV HBM
à ±8kV contact ESD protection on the following pins
à 48 TQFN, 7mm × 7mm (ZBE)
12-0236
→ OUT_Dx±
→ SDA_SINK, SCL_SINK
→ HPD_SINK
Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter)
1
Description
Pericom Semiconductor’s PI3VDP411LSA provides the ability
to use a Dual-mode DisplayPort™ transmitter in HDMI™ mode.
This flexibility provides the user a choice of how to connect to
their favorite display. All signal paths accept AC coupled video
signals. The PI3VDP411LSA converts this AC coupled signal into
an HDMI rev 1.3 compliant signal with proper signal swing. This
conversion is automatic and transparent to the user.
Output squelch function is provided for each channel. When out-
put channel is enable (OE#=0) and operating, that TMDS pixel
clock input signal determines whether the output is enabled.
When no TMDS pixel clock is present, TMDS output channel
will be disabled.
The PI3VDP411LSA supports up to 2.5Gbps, which provides 12-
bits of color depth per channel, as indicated in HDMI rev 1.3.
Pin Configuration (48-Pin TQFN)
IN_D1+
IN_D2+
IN_D3+
IN_D4+
IN_D1-
IN_D2-
IN_D3-
IN_D4-
GND
GND
VDD
VDD
37
39
41
42
43
44
45
46
47
48
38
40
36
1
35
2
34
3
33
4
32
5
www.pericom.com
GND
31
6
PI3VDP411LSA
30
7
29
8
28
9
27
10
26
11
PS9059A
25
12
24
22
20
19
18
17
16
15
14
13
23
21
GND
OUT_D1-
OUT_D1+
VDD
OUT_D2-
OUT_D2+
GND
OUT_D3-
OUT_D3+
VDD
OUT_D4-
OUT_D4+
07/28/12

Related parts for PI3VDP411LSAZBEX

PI3VDP411LSAZBEX Summary of contents

Page 1

... TQFN, 7mm × 7mm (ZBE) 12-0236 PI3VDP411LSA Description Pericom Semiconductor’s PI3VDP411LSA provides the ability to use a Dual-mode DisplayPort™ transmitter in HDMI™ mode. This flexibility provides the user a choice of how to connect to their favorite display. All signal paths accept AC coupled video signals ...

Page 2

... Block Diagram OE# IN_D4/3/2/1+ IN_D4/3/2/1- SR1/0 SQSEL DDC_EN (0V to 3.3V) DDCBSEL SDA_SOURCE SCL_SOURCE HPD_SOURCE 12-0236 Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter) 0V 50Ω 50Ω Rx Control Logic HPD 2 PI3VDP411LSA OUT_D4/3/2/1+ OUT_D4/3/2/1- SDA_SINK SCL_SINK HPD_SINK 100KΩ www.pericom.com PS9059A 07/28/12 ...

Page 3

... Active level shifter ENABLE Connected to SDA_SINK through bi-direc- tion buffer DDC level shifter type DISABLE DDC level shifter Passive level shifter ENABLE Connected to SCL_SINK through voltage- limiting integrated NMOS passgate Active level shifter ENABLE Connected to SCL_SINK through bi-direction buffer www.pericom.com PS9059A 07/28/12 ...

Page 4

... Active level shifter ENABLE Connected to SCL_SOURCE through bi- direction buffer DDC level shifter type DISABLE DDC level shifter Passive level shifter ENABLE Connected to SDA_SOURCE through voltage- limiting integrated NMOS passgate Active level shifter ENABLE Connected to SDA_SOURCE through bi- direction buffer Passgate Disable Enable www.pericom.com PS9059A 07/28/12 ...

Page 5

... IN_D3+. Low-swing diff input from DP Tx outputs. IN_D3+ makes a differential pair with IN_D3-. Low-swing diff input from DP Tx outputs. IN_D4- makes a differential pair with IN_D4+. Low-swing diff input from DP Tx outputs. IN_D4+ makes a differential pair with IN_D4-. 5 PI3VDP411LSA www.pericom.com PS9059A 07/28/12 ...

Page 6

... Intended for lowest power condition when: à No display is plugged in or à The level shifted data path is disabled HPD_SINK input and HPD_SOURCE output are not affected by OE# SCL_ SOURCE, SCL_SINK, SDA_SOURCE and SDA_SINK signals and functions are not affected by OE# www.pericom.com PS9059A 07/28/12 ...

Page 7

... Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter) (Over operating free-air temperature range) Rating 5.5V -0. +0.5V DD -40 to +85°C -65 to +150°C 150°C 260°C Min Typ Max Units 3.0 3.3 3.6 V 100 -40 85 Celsius (°) 7 PI3VDP411LSA Comments OE# = HIGH www.pericom.com PS9059A 07/28/12 ...

Page 8

... Nominal Tbit at 2.5 Gbps = 400 ps. 360ps = 400ps- 10% See note 1 below See note 2 below Required IN_D+ as well as IN_D- DC impedance (50 ±20% tolerance). Intended to limit power-up stress on chipset's PCIE output buffers. Differential inputs must high impedance state when OE# is HIGH. www.pericom.com PS9059A 07/28/12 ...

Page 9

... Measured with HPD_SINK at V IH-HPD and V min IL-HPD V = 3.3V ±10 -4mA(MIN) / -8mA(MAX 4mA(MIN) / 8mA(MAX) OL Time from HPD_SINK changing state to HPD_source changing state. Includes HPD_ source rise/fall time Time required to transition from V OH- HPDB from OL-HPDB OL-HPDB OH-HPDB www.pericom.com PS9059A is DD max 07/28/12 ...

Page 10

... Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter) Min Typ Max Units 2 0 µA Min Typ Max Units 100K Ω 10 PI3VDP411LSA Comments TMDS enable input changes state on cable plug/unplug Measured with input at V max and IH-EN V min IL-EN Comments Guarantees HPD_SINK is LOW when no display is plugged in. www.pericom.com PS9059A 07/28/12 ...

Page 11

... Refer JEDEC MO-220 4. Recommended land pattern is for reference only. 5. Thermal pad soldering area 09-0091 Note: 1.For latest package info, please check: http://www.pericom.com/support/packaging/packaging-mechanicals-and-thermal-characteristics 2.The exposed die paddle size is 3.6x3.6mm for PI3VDP411LSAZBE 3. Pad size (D2 * E2) is 157 x 157 mm Pericom Semiconductor Corporation • 1-800-435-2336 12-0236 All trademarks are property of their respective owners. Dual Mode DisplayPort™ ...

Page 12

... High-Definition Multimedia Interface Specification Version 1.4, HDMI Licensing, LLC, June 5, 2009 Ordering Information Ordering Code Package Code PI3VDP411LSAZBE ZB 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging Pb-free and Green 3. Adding an X suffix = Tape/Reel 12-0236 Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter) C control and ARC Transmitter ...

Page 13

... Revision History Date Changes 7/28/2012 Actual pad size 157 x 157 mil in package drawing 12-0236 Dual Mode DisplayPort™ to DVI/HDMI™ Electrical bridge (Level Shifter) 13 PI3VDP411LSA www.pericom.com PS9059A 07/28/12 ...

Related keywords