IS61LV12824-10BL-TR ISSI, Integrated Silicon Solution Inc, IS61LV12824-10BL-TR Datasheet - Page 10

• Manufacturer Part Number: IS61LV12824-10BL-TR
• Description: IC SRAM 3MBIT 10NS 119BGA
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS61LV12824-10BL-TR

• Format - Memory: RAM
• Memory Type: SRAM - Asynchronous
• Memory Size: 3M (128K x 24)
• Speed: 10ns
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 119-BGA
• Density: 3Mb
• Access Time (max): 10ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: BGA
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 180mA
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 119
• Word Size: 24b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS61LV12824
10
WRITE CYCLE NO. 3
ADDRESS
Note:
1. The internal Write time is defined by the overlap of CE1 and CE2 = LOW, CE2 = HIGH and WE = LOW. All signals must be
in valid states to initiate a Write, but any can be deasserted to terminate the Write. The Data Input Setup and Hold timing is
referenced to the rising or falling edge of the signal that terminates the Write.
D
CE1
CE2
OUT
WE
D
OE
IN
LOW
LOW
HIGH
t
DATA UNDEFINED
SA
(1)
(WE Controlled: OE
t
t
I S
AW
HZWE
LOW
VALID ADDRESS
DURING
t
t
PWE2
WC
Integrated Silicon Solution, Inc. — 1-800-379-4774
W
HIGH-Z
RITE
t
C
SD
YLE
DATA
)
IN
VALID
t
HD
t
LZWE
t
HA
ISSI
CE2_WR3.eps
06/22/05
Rev. D
®