MT46H32M32LFCM-6 IT:A TR Micron Technology Inc, MT46H32M32LFCM-6 IT:A TR Datasheet - Page 79

IC DDR SDRAM 1GBIT 90VFBGA

MT46H32M32LFCM-6 IT:A TR

Manufacturer Part Number
MT46H32M32LFCM-6 IT:A TR
Description
IC DDR SDRAM 1GBIT 90VFBGA
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT46H32M32LFCM-6 IT:A TR

Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
1G (32M x 32)
Speed
166MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
90-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1333-2
Figure 43: WRITE-to-PRECHARGE – Odd Number of Data, Interrupting
PDF: 09005aef82ce3074
1gb_ddr_mobile_sdram_t48m.pdf - Rev. K 07/09 EN
Command
Address
DQS
DQS
DQS
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DM
DM
DM
DQ
DQ
DQ
CK#
5, 6
5, 6
5, 6
CK
1
7
6
7
6
7
6
WRITE
Bank a,
Col b
T0
Notes:
2
t
t
t
DQSS
DQSS
DQSS
1. An interrupted burst of 8 is shown; one data element is written.
2. A10 is LOW with the WRITE command (auto precharge is disabled).
3. PRE = PRECHARGE.
4.
5. DQS is required at T4 and T4n to register DM.
6. If a burst of 4 is used, DQS and DM are not required at T3, T3n, T4, and T4n.
7. D
D
IN
t
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
D
IN
T1
IN
b = data-in for column b.
D
IN
T1n
NOP
T2
T2n
79
T3
NOP
1Gb: x16, x32 Mobile LPDDR SDRAM
t
WR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T3n
4
NOP
T4
Don’t Care
T4n
(a or all)
T5
PRE
Bank
©2007 Micron Technology, Inc. All rights reserved.
3
WRITE Operation
Transitioning Data
T6
NOP

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