CY62148ELL-55SXIT Cypress Semiconductor Corp, CY62148ELL-55SXIT Datasheet - Page 12

• Manufacturer Part Number: CY62148ELL-55SXIT
• Description: IC SRAM 4MBIT 55NS 32SOIC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62148ELL-55SXIT

• Memory Size: 4M (512K x 8)
• Format - Memory: RAM
• Memory Type: SRAM
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-SOIC (11.30mm Width)
• Memory Configuration: 512K X 8
• Access Time: 55ns
• Supply Voltage Range: 4.5V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 32
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Density: 4Mb
• Access Time (max): 55ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 19b
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 20mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Word Size: 8b
• Number Of Words: 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Document History Page
Document #: 38-05442 Rev. *H
Revision
Document Title: CY62148E MoBL
Document Number: 38-05442
*A
*B
*C
*D
*E
**
201580
249276
414820
464503
485639
833080
ECN
Change
Orig. of
NXR
SYT
ZSD
VKN
VKN
AJU
Submission
®
See ECN
See ECN
See ECN
See ECN
See ECN
01/08/04
4-Mbit (512 K × 8) Static RAM
Date
New datasheet
Changed from Advance Information to Preliminary
Moved Product Portfolio to Page 2
Added RTSOP II and Removed FBGA Package
Changed V
Changed I
Changed typo in Data Retention Characteristics(t
Changed t
Changed t
ns Speed Bin
Changed t
Bin
Changed t
Speed Bin
Changed t
45 ns Speed Bin
Changed t
Corrected typo in Package Name
Changed Ordering Information to include Pb-free Packages
Changed from Preliminary to Final
Changed the address of Cypress Semiconductor Corporation on Page #1 from
“3901 North First Street” to “198 Champion Court”
Removed 35ns Speed Bin
Removed “L” version of CY62148E
Changed I
Changed I
Changed I
Removed I
Changed I
Modified footnote #4 to include current limit
Removed redundant footnote on DNU pins
Changed the AC testload capacitance from 100 pF to 30 pF on page #4
Changed test load parameters R1, R2, R
645 Ω and 1.75 V to 1800 Ω, 990 Ω, 639 Ω and 1.77 V
Changed I
Added I
Changed t
Changed t
Changed t
Changed t
Changed t
Updated the ordering information table and replaced Package Name column with
Package Diagram
Included Automotive Range in product offering
Updated the Ordering Information
Corrected the operating range to 4.5 V - 5.5 V on page# 3
Added footnote #8
Added V
CCDR
IL
spec for SOIC package.
HZOE
SCE
SB2
CCDR
OHA
HZCE
SD
DOE
CC
CC
CC
CCDR
LZOE
LZCE
HZCE
PWE
SD
SB1
CC
from 15 to 18 ns for 35 ns Speed Bin and 20 to 22 ns for
typical value
from 22 ns to 25 ns
(Typ) value from 1.5 mA to 2 mA at f=1 MHz
(Max) value from 2 mA to 2.5 mA at f=1 MHz
(Typ) value from 12 mA to 15 mA at f=f
stabilization time in footnote #7 from 100 μs to 200 μs
from 25 to 30 ns for 35 ns Speed Bin and 40 to 35 ns for 45 ns Speed
Typ values from 0.7 μA to 1 μA and Max values from 2.5 μA to 7 μA
from 6 ns to 10 ns for both 35 ns and 45 ns Speed Bin
from 15 to 18 ns for 35 ns Speed Bin
spec from the Electrical characteristics table
from 30 ns to 35 ns
, t
and t
from 3 ns to 5 ns
from 12 to18 ns for 35 ns Speed Bin and 15 to 22 ns for 45 ns
from 22 ns to 18 ns
from 2.0 μA to 2.5 μA
from 2.5 μA to 7 μA
HZWE
LZWE
from 12 to 15 ns for 35 ns Speed Bin and 15 to 18 ns for 45
from 6 ns to 10 ns
Description of Change
TH
and V
R
TH
) from 100 μs to t
CY62148E MoBL
max
from 1838 Ω, 994 Ω,
Page 12 of 14
RC
ns
®
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