CAT24AA16TDI-GT3 ON Semiconductor, CAT24AA16TDI-GT3 Datasheet

IC EEPROM SRL 16KB I2C TSOT23-5

CAT24AA16TDI-GT3

Manufacturer Part Number
CAT24AA16TDI-GT3
Description
IC EEPROM SRL 16KB I2C TSOT23-5
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT24AA16TDI-GT3

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
16K (2K x 8)
Speed
1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
TSOT-23-5, TSOT-5, TSOP-5
Organization
2 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.7 V
Maximum Operating Current
1 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V , 2.5 V , 3.3 V , 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT24AA16TDI-GT3
Manufacturer:
ON Semiconductor
Quantity:
2 200
CAT24AA16
16-Kb I
EEPROM
Description
internally organized as 2048x8 bits.
100 kHz, 400 kHz and 1 MHz I
contiguous bytes into a Page Write Buffer, and then writing all data to
non−volatile memory in one internal write cycle. Data is read by
providing a starting address and then shifting out data serially while
automatically incrementing the internal address count.
Features
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 1
The CAT24AA16 is a 16−Kb CMOS Serial EEPROM device
The device features a 16−byte page write buffer and supports
Data is written by providing a starting address, then loading 1 to 16
(SCL and SDA)
Compliant
Standard and Fast I
Supports 1 MHz Clock Frequency
1.7 V to 5.5 V Supply Voltage Range
16−Byte Page Write Buffer
Hardware Write Protection for Entire Memory
Schmitt Triggers and Noise Suppression Filters on I
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial Temperature Range
This Device is Pb−Free, Halogen Free/BFR Free and are RoHS
SCL
WP
Figure 1. Functional Symbol
2
C CMOS Serial
2
CAT24AA16
C Protocol Compatible
V
V
CC
SS
2
C protocols.
SDA
2
C Bus Inputs
1
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Pin Name
SDA
SCL
V
V
WP
NC
CASE 751BD
CC
SS
W SUFFIX
SDA
SCL
ORDERING INFORMATION
V
V
SOIC−8
NC
NC
NC
SS
SS
PIN CONFIGURATIONS
http://onsemi.com
PIN FUNCTION
Serial Data Input/Output
Clock Input
Write Protect
Power Supply
Ground
No Connect
(Top View)
(Top View)
TSOT−23
1
2
3
4
1
2
3
SOIC
Publication Order Number:
8
7
6
5
5
4
Function
CASE 419AE
TB SUFFIX
TSOT−23
CAT24AA16/D
V
WP
SCL
SDA
WP
V
CC
CC

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CAT24AA16TDI-GT3 Summary of contents

Page 1

... Data is written by providing a starting address, then loading contiguous bytes into a Page Write Buffer, and then writing all data to non−volatile memory in one internal write cycle. Data is read by providing a starting address and then shifting out data serially while automatically incrementing the internal address count. ...

Page 2

Table 1. ABSOLUTE MAXIMUM RATINGS Parameters Storage Temperature Voltage on any Pin with Respect to Ground (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is ...

Page 3

Table 5. AC CHARACTERISTICS (Note 6) (V Symbol Parameter F Clock Frequency SCL t START Condition Hold Time HD:STA t Low Period of SCL Clock LOW t High Period of SCL Clock HIGH t START Condition Setup Time SU:STA t ...

Page 4

Power−On Reset (POR) Each CAT24AA16 incorporates Power−On Reset (POR) circuitry which protects the internal logic against powering up in the wrong state. The device will power up into Standby mode after V exceeds the POR trigger level and will CC ...

Page 5

... ACK will be returned and the host can then proceed with the next read or write operation. Hardware Write Protection With the WP pin held HIGH, the entire memory is protected against Write operations. If the WP pin is left floating or is grounded, it has no impact on the Write operation ...

Page 6

S BUS ACTIVITY MASTER T S SLAVE SCL th SDA 8 Bit Byte BUS ACTIVITY: A SLAVE R MASTER ADDRESS SLAVE ADDRESS BYTE ...

Page 7

... If, after receiving data sent by the Slave, the Master responds with ACK, then the Slave will continue transmitting until the Master responds with NoACK followed by STOP (Figure 12). During Sequential Read the internal byte address is automatically incremented up to the end of memory, where it then wraps around to the beginning of memory ...

Page 8

PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O SYMBOL ...

Page 9

TOP VIEW SIDE VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-193. PACKAGE DIMENSIONS TSOT−23, 5 LEAD CASE 419AE−01 ISSUE O SYMBOL MIN A A1 0.01 A2 ...

Page 10

... All packages are RoHS−compliant (Lead−free, Halogen−free). 10. The standard lead finish is NiPdAu. 11. The device used in the above example is a CAT24AA16TDI−GT3 (TSOT−23 5−Lead, Industrial Temperature, NiPdAu, Tape & Reel, 3,000/Reel). 12. The 10,000/Reel option is only available for the TSOT−23 5−Lead package. ...

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