DS28E04S-100+T Maxim Integrated Products, DS28E04S-100+T Datasheet - Page 27

IC EEPROM 4KBIT 16SOIC

DS28E04S-100+T

Manufacturer Part Number
DS28E04S-100+T
Description
IC EEPROM 4KBIT 16SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS28E04S-100+T

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
4K (256 x 16)
Interface
1-Wire Serial
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Speed
-
OVERDRIVE MATCH ROM [69h]
The Overdrive Match ROM command followed by a 64-bit ROM sequence transmitted at Overdrive speed allows
the bus master to address a specific DS28E04-100 on a multidrop bus and to simultaneously set it in Overdrive
mode. Only the DS28E04-100 that exactly matches the 64-bit ROM sequence responds to the subsequent
Memory/Control Function command. Slaves already in Overdrive mode from a previous Overdrive Skip or
successful Overdrive Match command remain in Overdrive mode. All overdrive-capable slaves return to standard
speed at the next Reset Pulse of minimum 480µs duration. The Overdrive Match ROM command can be used with
a single or multiple devices on the bus.
1-Wire SIGNALING
The DS28E04-100 requires strict protocols to ensure data integrity. The protocol consists of four types of signaling
on one line: Reset Sequence with Reset Pulse and Presence Pulse, Write-Zero, Write-One, and Read-Data.
Except for the Presence pulse, the bus master initiates all falling edges. The DS28E04-100 can communicate at
two different speeds, standard speed, and Overdrive speed. If not explicitly set into the Overdrive mode, the
DS28E04-100 communicates at standard speed. While in Overdrive Mode, the fast timing applies to all waveforms.
To get from idle to active, the voltage on the 1-Wire line needs to fall from V
from active to idle, the voltage needs to rise from V
make this rise is seen in Figure 15 as 'e' and its duration depends on the pullup resistor (R
capacitance of the 1-Wire network attached. The voltage V
a logical level, not triggering any events.
Figure 15 shows the initialization sequence required to begin any communication with the DS28E04-100. A Reset
Pulse followed by a Presence Pulse indicates the DS28E04-100 is ready to receive data, given the correct ROM
and Memory/Control Function command. If the bus master uses slew-rate control on the falling edge, it must pull
down the line for t
Mode, returning the device to standard speed. If the DS28E04-100 is in Overdrive Mode and t
80µs, the device remains in Overdrive Mode. If the device is in Overdrive Mode and t
480µs, the device will reset, but the communication speed is undetermined.
Figure 15. Initialization Procedure: Reset and Presence Pulse
After the bus master has released the line, it goes into receive mode. Now the 1-Wire bus is pulled to V
the pullup resistor, or in case of a DS2482-x00 or DS2480B driver, by active circuitry. When the threshold V
crossed, the DS28E04-100 waits for t
detect a presence pulse, the master must test the logical state of the 1-Wire line at t
The t
DS28E04-100 is ready for data communication. In a mixed population network, t
minimum 480µs at standard speed and 48µs at Overdrive speed to accommodate other 1-Wire devices.
RSTH
window must be at least the sum of t
V
IHMASTER
V
V
ILMAX
V
V
PUP
0V
TH
TL
RSTL
t
F
+ t
RESISTOR
F
MASTER TX “RESET PULSE” MASTER RX “PRESENCE PULSE”
to compensate for the edge. A t
PDH
t
RSTL
and then transmits a Presence Pulse by pulling the line low for t
PDHMAX
ILMAX
27 of 36
, t
MASTER
past the threshold V
PDLMAX
ILMAX
e
RSTL
, and t
is relevant for the DS28E04-100 when determining
t
PDH
duration of 480µs or longer exits the Overdrive
RECMIN
t
MSP
t
PDL
. Immediately after t
t
RSTH
TH
PUP
. The time it takes for the voltage to
below the threshold V
MSP
DS28E04
RSTH
.
t
REC
RSTL
should be extended to
is between 80µs and
RSTL
RSTH
PUP
is no longer than
) used and the
is expired, the
PUP
TL
. To get
through
PDL
TH
. To
is

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