UPD44646183AF5-E25-FQ1 Renesas Electronics America, UPD44646183AF5-E25-FQ1 Datasheet - Page 19

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UPD44646183AF5-E25-FQ1

Manufacturer Part Number
UPD44646183AF5-E25-FQ1
Description
SRAM DDRII 72MBIT 165-PBGA
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD44646183AF5-E25-FQ1

Format - Memory
RAM
Memory Type
SRAM - Synchronous, DDR II+
Memory Size
72M (4M x 18)
Speed
400MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD44646183AF5-E25-FQ1
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
UPD44646183AF5-E25-FQ1-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Remarks 1. This parameter is sampled.
5. K input is monitored for this operation. See below for the timing.
4. V
6. Guaranteed by design.
7. Echo clock is very tightly controlled to data valid / data hold. By design, there is a ± 0.1 ns variation from
8. This is a synchronous device. All addresses, data and control lines must meet the specified setup
K
DLL/PLL lock time begins once V
It is recommended that the device is kept NOP (LD# = HIGH) during these cycles.
or
K
2. Test conditions as specified with the output loading as shown in AC Test Conditions
3. Control input signals may not be operated with pulse widths less than TKHKL (MIN.).
4. V
echo clock to data. The data sheet parameters reflect tester guardbands and test setup variations.
and hold times for all latching clock edges.
DD
slew rate must be less than 0.1 V DC per 50 ns for DLL/PLL lock retention.
unless otherwise noted.
DD
Q is 1.5 V DC.
μ
PD44646092A-A, 44646182A-A, 44646362A-A, 44646093A-A, 44646183A-A, 44646363A-A
TKC reset
TKC reset
Preliminary Data Sheet M19960EJ1V0DS
DD
and input clock are stable.
19

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