UPD44646183AF5-E25-FQ1 Renesas Electronics America, UPD44646183AF5-E25-FQ1 Datasheet - Page 20

• Manufacturer Part Number: UPD44646183AF5-E25-FQ1
• Description: SRAM DDRII 72MBIT 165-PBGA
• Manufacturer: Renesas Electronics America

Specifications of UPD44646183AF5-E25-FQ1

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous, DDR II+
• Memory Size: 72M (4M x 18)
• Speed: 400MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Read and Write Timing
2.0 Clock Cycles Read Latency
[
ODT state
DQ
ODT state
BW#
20
Remarks 1. Q00 refers to output from address A0.
μ
Address
PD44646092A-A], [
R, W#
QVLD
CQ#
LD#
DQ
CQ
K#
K
2. Outputs are disabled (high impedance) 3 clock cycles after the last READ (LD# = LOW, R, W# = HIGH)
3. The third NOP cycle between Read to Write transition may not be necessary for correct device
4. When the ODT control pin is LOW or No Connect, the ODT function is always off.
Q01 refers to output from the next internal burst address following A0, etc.
is input in the sequences of [READ]-[NOP].
operation when Read latency = 2.0 clock cycles. However, it may be required to avoid bus contention.
TKHKL
1
NOP
TIVKH
μ
TAVKH
PD44646092A-A, 44646182A-A, 44646362A-A, 44646093A-A, 44646183A-A, 44646363A-A
TKHCQV
TKHCQX
Read Latency = 2.0 clock cycles
TKLKH
μ
PD44646182A-A], [
ODT-ON
A0
(burst of 2)
2
TKHCQV
TKHCQX
TKHAX
READ
TKHKH
TKHIX
A1
TCQHQVLD
3
TKHCQX1
(burst of 2)
TKHK#H
READ
Preliminary Data Sheet M19960EJ1V0DS
TCQHQX
TCQHQV
TKHQX
TKHQV
μ
4
PD44646362A-A]
NOP
TK#HKH
Q00
ODT-OFF
Q01
5
NOP
TKHQV
Q10
TKHQX
TCQHQX
TCQHQVLD
TCQHQV
ODT-ON
Q11
6
NOP
TKHQZ
A2
(burst of 2)
7
WRITE
TDVKH
A3
D20
8
(burst of 2)
TKHDX
WRITE
D21
ODT-ON
TCQHCQ#H
TDVKH
A4
D30
9
(burst of 2)
READ
D31
TKHDX
TCQ#HCQH
10
11
ODT-OFF
Q40
Q41