HT6256 Honeywell Microelectronics & Precision Sensors, HT6256 Datasheet

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HT6256

Manufacturer Part Number
HT6256
Description
IC SRAM 256KBIT 20MHZ 28DIP
Manufacturer
Honeywell Microelectronics & Precision Sensors
Series
HTMOS™r
Datasheet

Specifications of HT6256

Format - Memory
RAM
Memory Type
SRAM
Memory Size
256K (32K x 8)
Speed
20MHz
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 225°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
HIGH TEMPERATURE 32K x 8 STATIC RAM
FEATURES
HTMOS
• Specified Over -55 to +225 C
• Fabricated with HTMOS™ IV Silicon on Insulator (SOI)
• Read/Write Cycle Times 50 ns Support 20 MHz Clock
• Asynchronous Operation
• CMOS Input/Output Buffers
• Single 5 V
• Hermetic 28-Lead Ceramic DIP
GENERAL DESCRIPTION
The 32K x 8 High Temperature Static RAM is a high
performance 32,768 word x 8-bit static random access
memory with industry-standard functionality. It is fabri-
cated with Honeywell’s HTMOS™ technology, and is
designed for use in systems operating in severe high
temperature environments.
The RAM requires only a single 5 V
and has CMOS compatible I/O. Power consumption is
typically less than 30 mW/MHz in operation, and less than
10 mW when de-selected. The RAM read operation is fully
asynchronous, with an associated typical access time of
50 ns at 5 V.
The RAM provides guaranteed performance over the full
-55 to +225 C temperature range. Typically, parts will
operate up to +300 C for a year, with derated perfor-
mance. All parts are burned in at 250 C to eliminate infant
mortality.
Solid State Electronics Center • 12001 State Highway 55, Plymouth, MN 55441 • (800) 323-8295 • http://www.ssec.honeywell.com
TM
High Temperature Products
10% Power Supply
10% power supply
APPLICATONS
• Down-Hole Oil Well
• Avionics
• Turbine Engine Control
• Industrial Process Control
• Nuclear Reactor
• Electric Power Conversion
• Heavy Duty Internal Combustion Engines
DQ0
DQ1
DQ2
VSS
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
PACKAGE PINOUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
View
Top
28
27
26
25
24
23
22
21
20
19
18
17
16
15
HT6256
VDD
NWE
A13
A8
A9
A11
NOE
A10
NCS
DQ7
DQ6
DQ5
DQ4
DQ3

Related parts for HT6256

HT6256 Summary of contents

Page 1

... Avionics • Turbine Engine Control • Industrial Process Control • Nuclear Reactor • Electric Power Conversion • Heavy Duty Internal Combustion Engines A14 A12 10% power supply DQ0 DQ1 DQ2 VSS HT6256 PACKAGE PINOUT VDD 1 28 NWE 2 27 A13 A11 6 23 Top ...

Page 2

... HT6256 FUNCTIONAL DIAGRAM A:0-8,12-13 11 CE* NCS NWE NOE A:9-11 SIGNAL DEFINITIONS A: 0-14 Address input pins which select a particular eight-bit word within the memory array. DQ: 0-7 Bidirectional data pins which serve as data outputs during a read operation and as data inputs during a write operation. ...

Page 3

... Parameter VDR Data Retention Voltage IDR Data Retention Current (1) Operating conditions: TA= - +125 C. Parameter 28 DIP Worst Case Typical (2) Min 5 7 Worst Case Typical Min 2.5 3 HT6256 Rating Min Max -0.5 6.5 -0.5 VDD+0.5 -65 325 355 2 25 2000 10 Description Min Typ Max 4.5 5 ...

Page 4

... HT6256 DC ELECTRICAL CHARACTERISTICS — — — (1) Typical operating conditions: VDD= 5.0 V,TA=25 C. (2) Worst case operating conditions: VDD= 5.0 V 10%, TA=- +225 C. (3) All inputs switching. DC average current. External control of Chip Enable (CE) is available only in other package options. Operating Current vs. Frequency @ 225 C ...

Page 5

... External control of Chip Enable (CE) is available only in other package options. ADDRESS NCS HIGH DATA OUT IMPEDANCE CE NOE (NWE = high) Typical (2) >50 pF, or equivalent capacitive output loading AVAVR T T AVQV AXQX T SLQV T SLQX DATA VALID T EHQX T EHQV T GLQX T GLQV 5 HT6256 Worst Case (3) Units Min Max ...

Page 6

... HT6256 WRITE CYCLE AC TIMING CHARACTERISTICS ( (1) Test conditions: input switching levels VIL/VIH=0.5V/VDD-0.5V, input rise and fall times <1 ns/V, input and output timing reference levels shown in the Tester AC Timing Characteristics table, capacitive output loading >50 pF, or equivalent capacitive load for TWLQZ. (2) Typical operating conditions: VDD=5.0 V, TA=25 C. ...

Page 7

... TAVEL also must be provided for during the write operation. Hold times for address inputs and data inputs with respect to the disabling NWE/NCS/CE edge transition must be a minimum of TWHAX/TSHAX/TELAX time and TWHDX/ TSHDX/TELDX time, respectively. The minimum write cycle time is TAVAV. 7 HT6256 ...

Page 8

... Chip Enable (CE), call Honeywell Right Reading E on Lid Optional Capacitors (width) (pitch) HT6256DC C - Indicates screening level B = High Temperature Class Commercial and features internal 2 3 All dimensions in inches A 0.175 (max 0.018 ± 0.002 b2 0.050 (typ ...

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