AT45DB161D-MU-2.5 Atmel, AT45DB161D-MU-2.5 Datasheet - Page 21

• Manufacturer Part Number: AT45DB161D-MU-2.5
• Description: IC FLASH 16MBIT 50MHZ 8VDFN
• Manufacturer: Atmel

Specifications of AT45DB161D-MU-2.5

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 16M (4096 pages x 528 bytes)
• Speed: 50MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VFQFN, 8-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q2485478

3500N–DFLASH–05/10
12.
12.1
The device density is indicated using bits five, four, three, and two of the status register. For the Atmel
AT45DB161D, the four bits are 1011 The decimal value of these four binary bits does not equate to the device
density; the four bits represent a combinational code relating to differing densities of Atmel DataFlash devices. The
device density is not the same as the density code indicated in the JEDEC device ID information. The device
density is provided only for backward compatibility.
Table 11-1.
Deep Power-down
After initial power-up, the device will default in standby mode. The Deep Power-down command allows the device
to enter into the lowest power consumption mode. To enter the Deep Power-down mode, the CS pin must first be
asserted. Once the CS pin has been asserted, an opcode of B9H command must be clocked in via input pin (SI).
After the last bit of the command has been clocked in, the CS pin must be de-asserted to initiate the Deep Power-
down operation. After the CS pin is de-asserted, the will device enter the Deep Power-down mode within the
maximum t
for the Resume from Deep Power-down command.
Table 12-1.
Figure 12-1. Deep Power-down
Resume from Deep Power-down
The Resume from Deep Power-down command takes the device out of the Deep Power-down mode and returns it
to the normal standby mode. To Resume from Deep Power-down mode, the CS pin must first be asserted and an
opcode of ABH command must be clocked in via input pin (SI). After the last bit of the command has been clocked
in, the CS pin must be de-asserted to terminate the Deep Power-down mode. After the CS pin is de-asserted, the
device will return to the normal standby mode within the maximum t
the t
will return to the normal standby mode.
Table 12-2.
Command
Deep Power-down
CS
Command
Resume from Deep Power-down
RDY/BUSY
SI
RDPD
Bit 7
Each transition
represents eight bits
time before the device can receive any commands. After resuming form Deep Power-down, the device
EDPD
Deep Power-down
Resume from Deep Power-down
Status Register Format
time. Once the device has entered the Deep Power-down mode, all instructions are ignored except
Opcode
COMP
Bit 6
Bit 5
1
Bit 4
0
Bit 3
1
Bit 2
1
PROTECT
RDPD
Bit 1
Opcode
B9H
Opcode
time. The CS pin must remain high during
ABH
Atmel AT45DB161D
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