MT45W8MW16BGX-708 WT TR Micron Technology Inc, MT45W8MW16BGX-708 WT TR Datasheet - Page 19

• Manufacturer Part Number: MT45W8MW16BGX-708 WT TR
• Description: IC PSRAM 128MBIT 70NS 54VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT45W8MW16BGX-708 WT TR

• Format - Memory: RAM
• Memory Type: PSRAM (Page)
• Memory Size: 128M (8Mx16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1010-2

Software Access
asynchronous READ and asynchronous WRITE opera-
tions. The contents of the configuration registers can
be modified and all registers can be read using the
software sequence.
step sequence consisting of two asynchronous READ
operations followed by two asynchronous WRITE
operations (see Figure 16). The read sequence is virtu-
ally identical except that an asynchronous READ is
performed during the fourth operation (see Figure 17).
The address used during all READ and WRITE opera-
tions is the highest address of the CellularRAM device
being accessed (7FFFFFh for 128Mb); the contents of
this address are not changed by using this sequence.
(WRITE) in the sequence defines whether the BCR,
RCR, or the DIDR is to be accessed. If the data is 0000h,
the sequence will access the RCR; if the data is 0001h,
the sequence will access the BCR; if the data is 0002h,
the sequence will access the DIDR. During the fourth
operation, DQ[15:0] transfer data in to or out of bits
15–0 of the registers.
ability to perform the standard (CRE-controlled)
method of loading the configuration registers. How-
ever, the software nature of this access mechanism
eliminates the need for CRE. If the software mecha-
nism is used, CRE can simply be tied to V
line often used for CRE control purposes is no longer
required.
09005aef80ec6f79 pdf/09005aef80ec6f65 zip
Burst CellularRAM 1.5_128Mb__2.fm - Rev. D 2/05 EN
Software access of the registers uses a sequence of
The configuration registers are loaded using a four-
The data value presented during the third operation
The use of the software sequence does not affect the
ASYNC/PAGE/BURST CellularRAM 1.5 MEMORY
SS
. The port
19
Figure 16: Load Configuration Register
Figure 17: Read Configuration Register
ADDRESS
ADDRESS
LB#/UB#
LB#/UB#
DATA
DATA
WE#
WE#
OE#
CE#
OE#
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CE#
ADDRESS
ADDRESS
XXXXh
(MAX)
XXXXh
READ
(MAX)
READ
ADDRESS
ADDRESS
XXXXh
(MAX)
XXXXh
READ
(MAX)
READ
©2004 Micron Technology, Inc. All rights reserved.
RCR: 0000h
BCR: 0001h
DIDR: 0002h
RCR: 0000h
BCR: 0001h
8 MEG x 16
ADDRESS
ADDRESS
WRITE
WRITE
(MAX)
(MAX)
CR VALUE
ADDRESS
CR VALUE
ADDRESS
(MAX)
WRITE
READ
(MAX)
DON'T CARE
DON'T CARE
OUT
IN