M29W800DB90N6T STMicroelectronics, M29W800DB90N6T Datasheet - Page 5
![IC FLASH 8MBIT 90NS 48TSOP](/photos/7/26/72669/497-48-tsop_series_sml.jpg)
M29W800DB90N6T
Manufacturer Part Number
M29W800DB90N6T
Description
IC FLASH 8MBIT 90NS 48TSOP
Manufacturer
STMicroelectronics
Datasheet
1.M29W800DT90N6.pdf
(41 pages)
Specifications of M29W800DB90N6T
Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
8M (1M x 8 or 512K x 16)
Speed
90ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1717-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
SUMMARY DESCRIPTION
The M29W800D is a 8 Mbit (1Mb x8 or 512Kb x16)
non-volatile memory that can be read, erased and
reprogrammed. These operations can be per-
formed using a single low voltage (2.7 to 3.6V)
supply. On power-up the memory defaults to its
Read mode where it can be read in the same way
as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents.
The end of a program or erase operation can be
detected and any error conditions identified. The
Figure 2. Logic Diagram
A0-A18
BYTE
RP
W
G
E
19
M29W800DB
M29W800DT
V CC
V SS
15
DQ0-DQ14
DQ15A–1
RB
AI05470B
command set required to control the memory is
consistent with JEDEC standards.
The blocks in the memory are asymmetrically ar-
ranged, see Figures 6 and 7, Block Addresses.
The first or last 64 Kbytes have been divided into
four additional blocks. The 16 Kbyte Boot Block
can be used for small initialization code to start the
microprocessor, the two 8 Kbyte Parameter
Blocks can be used for parameter storage and the
remaining 32K is a small Main Block where the ap-
plication may be stored.
Chip Enable, Output Enable and Write Enable sig-
nals control the bus operation of the memory.
They allow simple connection to most micropro-
cessors, often without additional logic.
The memory is offered in SO44, TSOP48 (12 x
20mm), TFBGA48 6 x 9mm (0.8mm pitch) and
TFBGA48 6 x 8mm (0.8mm pitch) packages. The
memory is supplied with all the bits erased (set to
’1’).
Table 1. Signal Names
A0-A18
DQ0-DQ7
DQ8-DQ14
DQ15A–1
E
G
W
RP
RB
BYTE
V
V
NC
CC
SS
Address Inputs
Data Inputs/Outputs
Data Inputs/Outputs
Data Input/Output or Address Input
Chip Enable
Output Enable
Write Enable
Reset/Block Temporary Unprotect
Ready/Busy Output
(not available on SO44 package)
Byte/Word Organization Select
Supply Voltage
Ground
Not Connected Internally
M29W800DT, M29W800DB
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