PSD834F2-70J STMicroelectronics, PSD834F2-70J Datasheet - Page 71
![IC FLASH 2MBIT 70NS 52PLCC](/photos/7/24/72493/497-52-plcc_series_sml.jpg)
PSD834F2-70J
Manufacturer Part Number
PSD834F2-70J
Description
IC FLASH 2MBIT 70NS 52PLCC
Manufacturer
STMicroelectronics
Datasheet
1.PSD813F2VA-20JI.pdf
(109 pages)
Specifications of PSD834F2-70J
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2004-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PSD834F2-70J
Manufacturer:
WSI
Quantity:
409
Company:
Part Number:
PSD834F2-70J
Manufacturer:
STMicroelectronics
Quantity:
10 000
INITIAL DELIVERY STATE
When delivered from ST, the PSD device has all
bits in the memory and PLDs set to ’1.’ The PSD
Configuration Register bits are set to ’0.’ The code,
configuration, and PLD logic are loaded using the
Table 35. JTAG Enable Register
Note: 1. The state of Reset (RESET) does not interrupt (or prevent) JTAG operations if the JTAG signals are dedicated by an NVM Config-
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
uration bit (via PSDsoft Express). However, Reset (RESET) prevents or interrupts JTAG operations if the JTAG enable register is
used to enable the JTAG signals.
JTAG_Enable
X
X
X
X
X
X
X
0 = off JTAG port is disabled.
1 = on JTAG port is enabled.
0
0
0
0
0
0
0
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Not used, and should be set to zero.
Doc ID 10552 Rev 3
programming procedure. Information for program-
ming the device is available directly from ST.
Please contact your local sales representative.
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