CY7C1355C-100AXC Cypress Semiconductor Corp, CY7C1355C-100AXC Datasheet - Page 14

IC SRAM 9MBIT 100MHZ 100LQFP

CY7C1355C-100AXC

Manufacturer Part Number
CY7C1355C-100AXC
Description
IC SRAM 9MBIT 100MHZ 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1355C-100AXC

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
100MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-1628

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Part Number:
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Part Number:
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Quantity:
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Document #: 38-05539 Rev. *E
3.3V TAP AC Test Conditions
Input pulse levels ................................................ V
Input rise and fall times ................................................... 1 ns
Input timing reference levels ...........................................1.5V
Output reference levels...................................................1.5V
Test load termination supply voltage...............................1.5V
3.3V TAP AC Output Load Equivalent
otherwise noted)
Identification Register Definitions
V
V
V
V
V
V
I
Revision Number (31:29)
Device Depth (28:24)
Device Width (23:18)
Cypress Device ID (17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
Note:
TAP DC Electrical Characteristics
12. All voltages referenced to V
X
OH1
OH2
OL1
OL2
IH
IL
Parameter
TDO
Instruction Field
[12]
Z = 50Ω
O
Output HIGH Voltage
Output HIGH Voltage
Output LOW Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Load Current
SS
Description
(GND).
1.5V
20pF
00000110100
50Ω
CY7C1355C
(256Kx36)
I
I
I
I
I
I
GND < V
001001
100110
OH
OH
OH
OL
OL
OL
01010
And Operating Conditions (0°C < T
010
1
= 8.0 mA
= 8.0 mA
= 100 µA
= –4.0 mA, V
= –1.0 mA, V
= –100 µA
SS
to 3.3V
IN
< V
DDQ
Conditions
00000110100
CY7C1357C
DDQ
DDQ
(512Kx18)
001001
010110
01010
2.5V TAP AC Test Conditions
Input pulse levels................................................. V
Input rise and fall time .....................................................1 ns
Input timing reference levels......................................... 1.25V
Output reference levels ................................................ 1.25V
Test load termination supply voltage ............................ 1.25V
2.5V TAP AC Output Load Equivalent
010
= 3.3V
= 2.5V
1
V
V
V
V
V
V
V
V
V
V
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
DDQ
TDO
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
= 3.3V
= 2.5V
Describes the version number
Reserved for Internal Use
Defines memory type and architecture
Defines width and density
Allows unique identification of SRAM vendor
Indicates the presence of an ID register
A
< +70°C; V
Z = 50Ω
O
Min.
–0.5
–0.3
2.4
2.0
2.9
2.1
2.0
1.7
–5
DD
Description
= 3.3V ± 0.165V unless
1.25V
V
V
DD
DD
Max.
CY7C1355C
CY7C1357C
0.4
0.4
0.2
0.2
0.7
0.7
5
+ 0.3
+ 0.3
20pF
50Ω
Page 14 of 28
SS
to 2.5V
Unit
µA
V
V
V
V
V
V
V
V
V
V
V
V
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