M48Z58Y-70MH1E STMicroelectronics, M48Z58Y-70MH1E Datasheet - Page 11

IC NVSRAM 64KBIT 70NS 28SOIC

M48Z58Y-70MH1E

Manufacturer Part Number
M48Z58Y-70MH1E
Description
IC NVSRAM 64KBIT 70NS 28SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of M48Z58Y-70MH1E

Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
64K (8K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Data Bus Width
8 bit
Organization
8 Kbit x 8
Interface Type
Parallel
Access Time
70 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Operating Current
50 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5374-5
M48Z58Y-70MH1E

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M48Z58Y-70MH1E
Manufacturer:
STMicroelectronics
Quantity:
135
Part Number:
M48Z58Y-70MH1E
Manufacturer:
ST
Quantity:
20 000
M48Z58, M48Z58Y
2.3
Note:
Table 4.
1. Valid for ambient operating temperature: T
2. C
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
Data retention mode
With valid V
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when V
become high impedance, and all inputs are treated as “Don't care.”
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
user can be assured the memory will be in a write protected state, provided the V
is not less than t
into the deselect window during the time the device is sampling V
of the power supply lines is recommended.
When V
preserves data. The internal button cell will maintain data in the M48Z58/Y for an
accumulated period of at least 10 years when V
As system power returns and V
power supply is switched to external V
exceeds V
For more information on battery storage life refer to the application note AN1012.
t
t
WHQX
WLQZ
Symbol
noted).
t
t
t
t
t
t
t
t
t
t
t
t
t
WLWH
WHAX
DVWH
WHDX
AVWH
L
EHDX
AVWL
EHAX
DVEH
AVEH
AVEL
ELEH
AVAV
= 5 pF (see
(2)(3)
(2)(3)
CC
PFD
drops below V
CC
WRITE mode AC characteristics
WRITE cycle time
Address valid to WRITE enable low
Address valid to chip enable low
WRITE enable pulse width
Chip enable low to chip enable high
WRITE enable high to address transition
Chip enable high to address transition
Input valid to WRITE enable high
Input valid to chip enable high
WRITE enable high to input transition
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
(max).
applied, the M48Z58/Y operates as a conventional BYTEWIDE™ static
Figure 9 on page
F
. The M48Z58/Y may respond to transient noise spikes on V
CC
SO
falls within the V
, the control circuit switches power to the internal battery which
14).
Doc ID 2559 Rev 10
Parameter
CC
rises above V
A
CC
= 0 to 70 °C; V
(1)
. Normal RAM operation can resume t
PFD
(max), V
CC
SO
CC
is less than V
, the battery is disconnected, and the
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where
PFD
(min) window. All outputs
Min
70
50
55
30
30
60
60
SO
0
0
0
0
5
5
5
CC
M48Z58/Y
.
. Therefore, decoupling
Operating modes
Max
PFD
25
CC
(min), the
rec
CC
that reach
after V
fall time
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11/24
CC

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