M93C46-RDS6TG STMicroelectronics, M93C46-RDS6TG Datasheet - Page 8

• Manufacturer Part Number: M93C46-RDS6TG
• Description: IC EEPROM 1KBIT 1MHZ 8TSSOP
• Manufacturer: STMicroelectronics

Specifications of M93C46-RDS6TG

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 1K (128 x 8 or 64 x 16)
• Speed: 1MHz
• Interface: Microwire, 3-Wire Serial
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M93C86, M93C76, M93C66, M93C56, M93C46, M93C06
Figure 5. READ, WRITE, EWEN, EWDS Sequences
Note: For the meanings of An, Xn, Qn and Dn, see Table 4, Table 5 and Table 6.
Read
The Read Data from Memory (READ) instruction
outputs serial data on Serial Data Output (Q).
When the instruction is received, the op-code and
address are decoded, and the data from the mem-
ory is transferred to an output shift register. A dum-
my 0 bit is output first, followed by the 8-bit byte or
the 16-bit word, with the most significant bit first.
Output data changes are triggered by the rising
edge of Serial Clock (C). The M93Cx6 automati-
cally increments the internal address register and
clocks out the next byte (or word) as long as the
Chip Select Input (S) is held High. In this case, the
dummy 0 bit is not output between bytes (or
words) and a continuous stream of data can be
read.
8/30
READ
WRITE
ERASE
WRITE
ENABLE
S
Q
S
Q
S
D
D
D
1 1 0 An
1 0
1
CODE
CODE
CODE
OP
OP
0
OP
1
0
1
An
1
ADDR
ADDR
Xn X0
A0
A0
Qn
Dn
DATA OUT
DATA IN
Erase/Write Enable and Disable
The Erase/Write Enable (EWEN) instruction en-
ables the future execution of erase or write instruc-
tions, and the Erase/Write Disable (EWDS)
instruction disables it. When power is first applied,
the M93Cx6 initializes itself so that erase and write
instructions are disabled. After an Erase/Write En-
able (EWEN) instruction has been executed, eras-
ing and writing remains enabled until an Erase/
Write Disable (EWDS) instruction is executed, or
until V
voltage. To protect the memory contents from ac-
cidental corruption, it is advisable to issue the
Erase/Write Disable (EWDS) instruction after ev-
ery write cycle. The Read Data from Memory
(READ) instruction is not affected by the Erase/
Write Enable (EWEN) or Erase/Write Disable
(EWDS) instructions.
ERASE
WRITE
DISABLE
CC
falls below the power-on reset threshold
S
D
D0
Q0
BUSY
1
CODE
STATUS
CHECK
0
OP
0
0
0
READY
Xn X0
AI00878C