DS1251YP-70 Maxim Integrated Products, DS1251YP-70 Datasheet - Page 6
![IC NVSRAM 4MBIT 70NS 34PCM](/photos/6/58/65856/406-34-pcm_sml.jpg)
DS1251YP-70
Manufacturer Part Number
DS1251YP-70
Description
IC NVSRAM 4MBIT 70NS 34PCM
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1251Y-70.pdf
(21 pages)
Specifications of DS1251YP-70
Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
4M (512K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
34-PowerCap™ Module
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DS1251/DS1251P
PHANTOM CLOCK REGISTER DEFINITION Figure 2
AM/PM/12/24 MODE
Bit 7 of the hours register is defined as the 12-hour or 24-hour mode-select bit. When high, the 12-hour
mode is selected. In the 12-hour mode, bit 5 is the AM/PM bit with logic high being PM. In the 24-hour
mode, bit 5 is the second 10-hour bit (20–23 hours).
OSCILLATOR AND RESET BITS
Bits 4 and 5 of the day register are used to control the
and oscillator functions. Bit 4 controls the
RST
(pin 1). When the
bit is set to logic 1, the
input pin is ignored. When the
bit is set to
RST
RST
RST
RST
logic 0, a low input on the
pin will cause the phantom clock to abort data transfer without changing
RST
data in the watch registers. Bit 5 controls the oscillator. When set to logic 1, the oscillator is off. When set
to logic 0, the oscillator turns on and the watch becomes operational. These bits are shipped from the
factory set to a logic 1.
ZERO BITS
Registers 1, 2, 3, 4, 5, and 6 contain one or more bits, which will always read logic 0. When writing these
locations, either a logic 1 or 0 is acceptable.
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