PLC810PG Power Integrations, PLC810PG Datasheet - Page 7

IC OFFLINE CTRLR CM OCP HV 24DIP

PLC810PG

Manufacturer Part Number
PLC810PG
Description
IC OFFLINE CTRLR CM OCP HV 24DIP
Manufacturer
Power Integrations
Series
HiperPLC™r
Datasheet

Specifications of PLC810PG

Output Isolation
Isolated
Frequency Range
50 ~ 300kHz
Voltage - Input
8.1 ~ 15 V
Voltage - Output
600V
Power (watts)
700mW
Operating Temperature
-40°C ~ 125°C
Package / Case
24-DIP (0.300", 7.62mm)
Switching Frequency
300 KHz
Maximum Power Dissipation
700 mW
Mounting Style
Through Hole
For Use With
596-1265 - KIT REF DESIGN FOR PLC810
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
596-1264-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PLC810PG
Manufacturer:
POWER
Quantity:
15 000
Part Number:
PLC810PG
Manufacturer:
POWER
Quantity:
20 000
using a resistor connected between the VREF pin and the FMAX
pin using the curve in Figure 15. The resistor on the FMAX pin also
sets the LLC dead time interval (see Figure 14).
The FBL pin provides output voltage regulation. As such the
current entering this pin modulates the switching frequency. More
current forces a higher switching frequency. The FMAX pin sets an
upper limit for the switching frequency to ensure zero voltage
switching. Minimum switching frequency is determined by the
adjusting minimum bias applied to the FBL pin.
If the external feedback circuit attempts to push the LLC controller
to a frequency equal to or higher than the maximum frequency
limit set by the resistor at FMAX pin, the LLC MOSFET gate driver
outputs are turned off until the current into the FBL pin drops
below the FMAX pin current. The gate outputs are turned off
synchronously with the clock for whole cycles.
LLC Soft Start
The LLC controller implements a soft start to prevent excessive
currents during startup, and to prevent overshoot on the output
when the feedback loop comes into operation. The soft start
time is determined by external components on the FBL pin. In
the event of an LLC fault turning off the LLC circuit, the external
circuit is allowed to discharge, initiating a new soft start. When
the soft start signal is asserted, the FBL pin is pulled up to V
(3.3 V), keeping the current applied to the FBL pin to maximum.
During the soft start cycle, the LLC outputs turn on and the
switching frequency slowly decays from its maximum to the
nominal operating point.
LLC Overcurrent Detection (ISL Pin)
Overcurrent in the LLC converter is detected via a sense
resistor in series with the low side of the transformer’s primary
winding. When the overcurrent condition is detected, the LLC
MOSFETS are turned OFF. The overcurrent detection has two
www.powerint.com
REF
thresholds; fast overcurrent threshold (V
current threshold (V
triggered by abnormally high current. The LLC is shutdown
immediately if the pulse on the ISL pin exceeds this threshold.
The slow overcurrent threshold is lower than the fast over-
current threshold. The slow overcurrent response is triggered
and the LLC is shutdown if the ISL pin voltage exceeds this
threshold for eight consecutive clock cycles.
Typically the (V
failures such as shorted components, while the slow V
threshold is used to detect overload conditions. This over-
current detection circuit prevents the LLC converter from
operating in the capacitive region of the LLC, thus avoiding
failure of the converter components from overheating.
Other LLC Control Blocks
The non-overlap (dead time) generator creates two non-
overlapping signals with equal on-times to drive the LLC
MOSFETS. The drive signal for the two LLC MOSFETS is
symmetrical with a 50% duty cycle. The dead time block is
used both by the PFC and LLC to control the dead time of the
switching function. The dead time in the PLC810PG is
configurable via the FMAX pin. The dead time allows zero
voltage switching, reducing the body diode losses in the
switching MOSFETs and minimizing the reverse recovery time of
the body diodes.
Start-up
Once the VCC voltages reach the startup voltage (V
PLC810PG starts switching the PFC MOSFET and the PFC
output ramps to its nominal value. When the PFC boost voltage
(sensed through FBP pin) raises the FBP pin voltage above the
LLC start threshold (V
LLC soft start begins.
ISL(F)
) threshold is used to detect catastrophic
ISL(S)
SD(H)
). The fast overcurrent threshold is
), the LLC circuit is enabled and the
PLC810PG
ISL(F)
) and slow over-
UVLO(+)
ISL(S)
Rev. F 08/09
), the
7

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