NCP1200P40 ON Semiconductor, NCP1200P40 Datasheet - Page 14

IC CTRLR PWM CM 8DIP

NCP1200P40

Manufacturer Part Number
NCP1200P40
Description
IC CTRLR PWM CM 8DIP
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1200P40

Output Isolation
Isolated
Frequency Range
36 ~ 48kHz
Voltage - Input
11.4 ~ 16 V
Operating Temperature
-25°C ~ 150°C
Package / Case
8-DIP (0.300", 7.62mm)
Number Of Outputs
1
Duty Cycle (max)
80 %
Output Current
250 mA
Mounting Style
Through Hole
Switching Frequency
42 KHz
Operating Supply Voltage
16 V
Maximum Operating Temperature
+ 150 C
Fall Time
28 ns
Rise Time
67 ns
Synchronous Pin
No
Topology
Flyback, Forward
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
NCP1200P40OS

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withstand accidental avalanche energy, e.g. during a
high−voltage spike superimposed over the mains, without
the help of a clamping network. If this leakage path
permanently forces a drain−source voltage above the
MOSFET BVdss (600 V), a clamping network is mandatory
and must be built around Rclamp and Clamp. Dclamp shall
react extremely fast and can be a MUR160 type. To calculate
the component values, the following formulas will help you:
R
with:
V
between 40 V to 80 V above the reflected output voltage
when the supply is heavily loaded.
V
diode voltage drop
L
N: the Ns:Np conversion ratio
F
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
C
2 @ V
ORDERING INFORMATION
Specifications Brochure, BRD8011/D.
out
SW
clamp =
clamp
leak
clamp
NCP1200P40G
NCP1200D40R2G
NCP1200P60G
NCP1200D60R2G
NCP1200P100G
NCP1200D100R2G
If the leakage inductance is kept low, the MTD1N60E can
: the switching frequency
+ Vf: the regulated output voltage level + the secondary
: the primary leakage inductance
clamp
: the desired clamping level, must be selected to be
Device
+
V
@ (V
ripple
L
leak
clamp
@ Fsw @ R
V
@ Ip
clamp
* (V
2
@ Fsw
out
F
F
F
clamp
SW
SW
SW
) Vf sec) @ N)
= 100 kHz
Type
= 40 kHz
= 60 kHz
http://onsemi.com
1200P100
1200P40
1200P60
Marking
200D4
200D6
200D1
14
V
which will damp the leakage oscillations but also provide
more capacitance at the MOSFET’s turn−off. The peak
voltage at which the leakage forces the drain is calculated
by:
where C
at the MOSFET opening. Typical values for Rsnubber and
Csnubber in this 4W application could respectively be 1.5
kW and 47 pF. Further tweaking is nevertheless necessary to
tune the dissipated power versus standby power.
Available Documents
“Implementing the NCP1200 in Low−cost AC−DC
Converters”, AND8023/D.
“Conducted EMI Filter Design for the NCP1200’’,
AND8032/D.
“Ramp Compensation for the NCP1200’’, AND8029/D.
TRANSient and AC models available to download at:
http://onsemi.com/pub/NCP1200
NCP1200 design spreadsheet available to download at:
http://onsemi.com/pub/NCP1200
V
ripple
max
Another option lies in implementing a snubber network
: the clamping ripple, could be around 20 V
+ Ip @
lump
represents the total parasitic capacitance seen
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
(Pb−Free)
Package
SOIC−8
SOIC−8
SOIC−8
PDIP−8
PDIP−8
PDIP−8
C
L
lump
leak
2500 / Tape & Reel
2500 / Tape & Reel
2500 / Tape & Reel
50 Units / Rail
50 Units / Rail
50 Units / Rail
Shipping

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