ISL9204IRZ-T Intersil, ISL9204IRZ-T Datasheet - Page 8

• Manufacturer Part Number: ISL9204IRZ-T
• Description: IC VOLTAGE CHARGER LI-ION 8-DFN
• Manufacturer: Intersil

Specifications of ISL9204IRZ-T

• Function: Charge Management
• Battery Type: Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
• Voltage - Supply: 4.3 V ~ 10 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISL9204IRZ-TTR

CHG Indication
The CHG is an open-drain output capable to at least 10mA
current when the charger starts to charge and turns off when
the EOC current is reached. The CHG signal is interfaced
either with a micro-processor GPIO or an LED for indication.
EN Input
EN is an active-low logic input to enable the charger. Drive
the EN pin to LOW or leave it floating to enable the charger.
This pin has a 200kΩ internal pulldown resistor so when left
floating, the input is equivalent to logic LOW. Drive this pin to
HIGH to disable the charger. The threshold for HIGH is given
in the ES (Electrical Specification) table.
IREF Pin
The IREF pin has the two functions as described in the Pin
Description section. When setting the fast charge current,
the charge current is guaranteed to have 10% accuracy with
the charge current set at 150mA. When monitoring the
charge current, the accuracy of the IREF pin voltage vs. the
actual charge current has the same accuracy as the gain
from the IREF pin current to the actual charge current. The
accuracy is 10% at 150mA and is expected to drop to 30% of
the actual current (not the set constant charge current) when
the current drops to 50mA.
Operation Without the Battery
The ISL9204 relies on a battery for stability and is not
guaranteed to be stable if the battery is not connected. With
a battery, the charger will be stable with an output ceramic
decoupling capacitor in the range of 1µF to 200µF. The
maximum load current is limited by the dropout voltage or
the thermal foldback.
Dropout Voltage
The constant current may not be maintained due to the
r
resistance of the pass FET is 1.2Ω the maximum operating
temperature, thus if tested with 350mA current and 4.2V
battery voltage, constant current could not be maintained
when the input voltage is below 4.62V.
Thermal Foldback
The thermal foldback function starts to reduce the charge
current when the internal temperature reaches a typical
value of 115°C.
DS(ON)
limit at a low input voltage. The worst case on
8
ISL9204
Applications Information
Input Capacitor Selection
The input capacitor is required to suppress the power supply
transient response during transitions. Mainly this capacitor is
selected to avoid oscillation during the start up when the
input supply is passing the POR threshold and the VIN-BAT
comparator offset voltage. When the battery voltage is above
the POR threshold, the VIN-VBAT offset voltage dominates
the hysteresis value. Typically, a 1µF X5R ceramic capacitor
should be sufficient to suppress the power supply noise.
Output Capacitor Selection
The criteria for selecting the output capacitor is to maintain
the stability of the charger as well as to bypass any transient
load current. The minimum capacitance is a 1µF X5R
ceramic capacitor. The actual capacitance connected to the
output is dependent on the actual application requirement.
Charge Current Limit
The actual charge current in the CC mode is limited by
several factors in addition to the set I
three limits for the charge current in the CC mode. The
charge current is limited by the on resistance of the pass
element (power P-channel MOSFET) if the input and the
output voltage are too close to each other. The solid curve
shows a typical case when the battery voltage is 4.0V and
the charge current is set to 350mA. The non-linearity on the
R
higher die temperature. If the battery voltage increases to
higher than 4.0V, the entire curve moves towards right side.
As the input voltage increases, the charge current may be
reduced due to the thermal foldback function. The limit
caused by the thermal limit is dependent on the thermal
impedance. As the thermal impedance increases, the
thermal-limited curve moves towards left, as shown in
Figure 13.
Layout Guidance
The ISL9204 uses a thermally-enhanced DFN package that
has an exposed thermal pad at the bottom side of the
package. The layout should connect as much as possible to
copper on the exposed pad. Typically the component layer is
more effective in dissipating heat. The thermal impedance
can be further reduced by using other layers of copper
connecting to the exposed pad through a thermal via array.
Each thermal via is recommended to have 0.3mm diameter
and 1mm distance from other thermal vias.
ON
-limited region is due to the increased resistance at
REF
. Figure 13 shows
October 4, 2005
FN9207.0