LTC1759CG#TR Linear Technology, LTC1759CG#TR Datasheet - Page 23
![IC CHARGER SMART BATTERY 36SSOP](/photos/6/59/65995/161-36-ssop_sml.jpg)
LTC1759CG#TR
Manufacturer Part Number
LTC1759CG#TR
Description
IC CHARGER SMART BATTERY 36SSOP
Manufacturer
Linear Technology
Datasheet
1.LTC1759CGPBF.pdf
(28 pages)
Specifications of LTC1759CG#TR
Function
Charge Management
Battery Type
Smart Batteries
Voltage - Supply
11 V ~ 24 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
36-SSOP (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIONS
Charge Termination Issues
Batteries with constant current charging and voltage-
based charger termination might experience problems
with reductions of charger current caused by adapter
limiting. It is recommended that input limiting feature be
defeated in such cases. Consult the battery manufacturer
for information on how your battery terminates charging.
Setting Output Current Limit (Refer to Figure 10)
The LTC1759 current DAC and the PWM analog circuitry
must coordinate the setting of the charger current. Failure
to do so will result in incorrect charge currents.
Table 8. Recommended Resistor Values
Warning
DO NOT CHANGE THE VALUE OF R
TION. The value must remain fixed and track the R
1.023
2.046
4.092
8.184
I
MAX
(A)
ADAPTER
INPUT
AC
( ) 1%
R
0.100
0.025
0.012
0.05
SENSE
C9, 0.1 F
C11, 1 F
V
DD
C13, 0.33 F
R
475k
WEAK
C12, 0.68 F
+
U
R
0.25
0.25
SENSE
(W)
0.5
C15
10 F
35V
Al
1
RNR
10k
D1: MBRS130LT3
D2: FMMD7000
L1: SUMIDA CDRH127-150
INFORMATION
V
DD
U
R4, 1.5k
R7, 1k
R
R
R
RUR
1k
VLIMIT
ILIMIT
SET
R
( ) 1%
S1
C14
0.1 F
, 3.83k
200
200
200
200
, 33k
, 33k
= R
ILIMIT
S2
W
16
12
25
24
18
17
28
27
11
20
19
14
15
13
7
4
5
6
UV
V
SYNC
SDB
CHGEN
V
I
DGND
I
PROG
V
COMP1
AGND
RNR
THERM
SDA
SCL
INTB
LIMIT
SET
DD
LIMIT
C
( ) 1%
DURING OPERA-
Figure 10. 4A SMBus Smart Battery Charger
LTC1759
3.83k
3.83k
3.83k
4.02k
R
15.8k
R1
SET
BOOSTC
BOOST
BGATE
SENSE
DCDIV
TGATE
GBIAS
PGND
INFET
Q1: Si3457DV
Q2, Q3: Si3456DV
DCIN
BAT1
BAT2
SPIN
V
CLP
CLN
V
SW
SET
CC
U
22
21
8
32
9
10
2
33
34
1
3
35
30
29
31
23
26
36
( ) 1%
R
Open
ILIMIT
10k
33k
SENSE
0
C5, 2.2 F
D2
Q1
and R
can result in currents that greatly exceed the requested
value and potentially damage the battery or overload the
wall adapter if no input current limiting is provided.
Example Calculations
Setting up the output current to the desired value involves
calculating these values:
1. R
2. R
3. R
The value of R
other based on the values chosen for R
prevent current sense op amp input bias errors, the value
of R
used to scale the PROG pin current relative to the R
voltage drop to set the maximum current value.
The following example is for a 4A design.
R2
1k
C2
0.47 F
C4, 0.1 F
D2
charger output.
gramming current scale.
the current DAC (I
SENSE
SET
ILIMIT
S1
R3
499
SET
0.68 F
and R
: This resistor sets the current DAC output pro-
R
CL
C6
1 F
, 0.033
values at all times. Changing the current setting
C1
: This resistor programs the full-scale value of
: This resistor is the current sense resistor on the
S2
SENSE
are kept the same, about 200 . R
Q2
Q3
and R
R
R
C8
0.047 F
MAX
D1
C16
22 F
S1
S2
15 H
, 200
, 200
SYSTEM
POWER
L1
).
0.015 F
SET
C7
0.025
R
are directly related to each
SENSE
68
R6
+
C3
22 F
S1
LTC1759
and R
INTB
SCL
SDA
BATTERY
SMART
23
SMBus
TO
HOST
S2
1759 F10
SET
SENSE
. To
is