LT1511CSW Linear Technology, LT1511CSW Datasheet - Page 13

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LT1511CSW

Manufacturer Part Number
LT1511CSW
Description
IC BATT CHRGR CONST I/V 3A24SOIC
Manufacturer
Linear Technology
Datasheet

Specifications of LT1511CSW

Function
Charge Management
Battery Type
Li-Ion, NiCd, NiMH
Voltage - Supply
6 V ~ 28 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Example: V
For example, V
APPLICATIONS
R
t
f = 200kHz
Total Power in the IC is: 0.27 + 0.33 + 0.9 = 1.5W
Temperature rise will be (1.5W)(30 C/W) = 45 C. This
assumes that the LT1511 is properly heat sunk by con-
necting the seven fused ground pins to expanded traces
and that the PC board has a backside or internal plane for
heat spreading.
The P
diode D2 (see Figure 1) to a lower system voltage (lower
than V
OL
SW
Then P
P
P
P
P
P
P
= Effective switch overlap time 10ns
BIAS
DRIVER
SW
DRIVER
SW
BIAS
= Switch ON resistance 0.16
DRIVER
8.4
BAT
15
DRIVER
) instead of V
0.81 0.09 0.9W
2
IN
I
3
BAT
3.5mA V
3.5mA 15
term can be reduced by connecting the boost
7.5mA
= 15V, V
2
V
X
I
3 8.4
BAT
V
0.16 8.4
BAT
= 3.3V then:
2
15
IN
R
V
U
SW
2
IN
55 15
I
BAT
V
BAT
IN
BAT
2
7.5mA
BAT
0.012 3
55 V
INFORMATION
V
1
U
= 8.4V, I
.
BAT
V
1.5mA 8.4
2
1.5mA V
BAT
IN
8 4
10
30
55
1
.
9
V
0.012 I
V
V
IN
BAT
BAT
X
30
W
t
15 3 200kHz
OL
0.27W
0.33W
BAT
= 3A;
1
V
IN
BAT
V
30
X
I
BAT
U
f
The average I
Fused-lead packages conduct most of their heat out the
leads. This makes it very important to provide as much PC
board copper around the leads as is practical. Total
thermal resistance of the package-board combination is
dominated by the characteristics of the board in the
immediate area of the package. This means both lateral
thermal resistance across the board and vertical thermal
resistance through the board to other copper layers. Each
layer acts as a thermal heat spreader that increases the
heat sinking effectiveness of extended areas of the board.
Total board area becomes an important factor when the
area of the board drops below about 20 square inches. The
graph in Figure 8 shows thermal resistance vs board area
for 2-layer and 4-layer boards with continuous copper
planes. Note that 4-layer boards have significantly lower
thermal resistance, but both types show a rapid increase
for reduced board areas. Figure 9 shows actual measured
lead temperatures for chargers operating at full current.
Battery voltage and input voltage will affect device power
dissipation, so the data sheet power calculations must be
used to extrapolate these readings to other situations.
Vias should be used to connect board layers together.
Planes under the charger area can be cut away from the
rest of the board and connected with vias to form both a
P
P
DRIVER
DRIVER
V
X
VX
0 11
V
3
3 3
X
.
required is:
A
.
L1
Figure 7. Lower V
V
I
W
VX
8 4
.
V
+
34
55 15
3 3
D2
mA
10 F
C2
.
V
V
SW
BOOST
SPIN
BOOST
1
LT1511
3 3
1511 • F07
30
.
V
LT1511
0 11
.
13
W

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