ISL6296DHZ-T Intersil, ISL6296DHZ-T Datasheet - Page 4

• Manufacturer Part Number: ISL6296DHZ-T
• Description: IC AUTHENTICATION DEVICE SOT23-5
• Manufacturer: Intersil
• Series: FlexiHash™r

Specifications of ISL6296DHZ-T

• Function: Battery Authentication
• Battery Type: Li-Ion, Li-Pol, NiMH
• Voltage - Supply: 2.6 V ~ 4.8 V
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: SC-74A, SOT-753
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ISL6296DHZ-TTR

Electrical Specifications
XSD Input Deglitch Time
Device Wake-Up Time
Device Sleep Wait Time
Auto-Sleep Time-Out Period
OTP ROM Write Time
Hash Calculation Time
Soft-Reset Time
AC CHARACTERISTICS
Oscillator Clock Frequency
Charge Pump Clock Frequency
Pin Descriptions
PIN NUMBER
1
2
3
4
5
PARAMETER
PIN NAME
VDD
VSS
XSD
TIO
NC
System ground.
No connection.
Supply voltage.
Production test I/O pin. Used only during production testing. Must be left floating during normal operation.
Communication bus with weak internal pull-down to VSS. This pin is a Schmitt-trigger input and an open-drain
output. An appropriate pull-up resistor is required on the host side.
4
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: T
SYMBOL
T
T
T
T
T
T
T
f
HASH
ASLP
SRST
WDG
OSC
WKE
EEW
f
SLP
CP
Pulse width narrower than the deglitch time will not
cause the device to wake up
From falling-edge of break command issued by host to
falling-edge of break command returned by device
From when the ‘11’ Opcode is detected to the shut-off
of the internal regulator
From the last transition detected on the XSD bus to the
device going into sleep mode
From the last BT of the 2nd write data frame to when
device is ready to accept the next instruction
From the last BT of the Challenge Code Word from the
host to the Authentication Code being available for read
From the last BT of the Soft-Reset instruction issued by
the host to the falling-edge of break command returned
by device
Internal bus reference clock
Internal high speed clock (observable only in test mode)
Low-speed mode
High-speed mode
A
ISL6296
= -25°C to +85°C; V
TEST CONDITIONS
DESCRIPTION
DD
= 2.6V to 4.8V. (Continued)
(Note 5)
MIN
505
0.9
3.6
35
16
7
4
-
-
-
TYP
532
1.8
60
20
1
5
-
-
-
-
(Note 5)
MAX
100
560
1.1
1.9
20
30
24
6
-
-
March 21, 2008
FN9201.2
UNITS
MHz
MHz
kHz
ms
BT
µs
µs
µs
µs
s