ISL6252HRZ Intersil, ISL6252HRZ Datasheet - Page 20

• Manufacturer Part Number: ISL6252HRZ
• Description: IC BATTERY CHARGER CTRLR 28-QFN
• Manufacturer: Intersil

Specifications of ISL6252HRZ

• Function: Charge Management
• Battery Type: Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
• Voltage - Supply: 7 V ~ 25 V
• Operating Temperature: -10°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 28-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The Bode plot of the loop gain, the compensator gain and
the power stage gain is shown in Figure 20:
Adapter Current Limit Control Loop
If the combined battery charge current and system load
current draws current that equals the adapter current limit
set by the ACLIM pin, ISL6252 will reduce the current to the
battery and/or reduce the output voltage to hold the adapter
current at the limit. Above the adapter current limit, the
minimum current buffer equals the output of gm3 and
ICOMP controls the charger output. Figure 21 shows the
adapter current limit control loop.
.
The loop response equations, Bode plots and the selection
of C
with loop gain reduced by the duty cycle and the ratio of
R
D = 50%, the loop gain will be 6dB lower than the loop gain
in Figure 20. This gives lower crossover frequency and
higher phase margin in this mode. If R
S1
DCIN
ICOMP
/R
FIGURE 20. CHARGE CURRENT LOOP BODE PLOTS
-20
-40
-60
60
40
20
S2
R
C
0.01k
0
C
S1
F1
FIGURE 21. ADAPTER CURRENT LIMIT LOOP
ICOMP
. In other words, if R
are the same as the charge current control loop
ICOMP
CSIN
CSIP
R
F1
0.1k
Σ
f
POLE1
11
+
-
20
gm3
0.25
FREQUENCY (Hz)
CA1
-
+
PHASE
+
-
1k
f
ZERO
20
S1
ACLIM
R
= R
f
FILTER
FET
CA2
20
S2
_r
f
+
-
POLE2
10k
DS(ON)
and the duty cycle
S1
+
-
CSON
CSOP
/R
COMPENSATOR
MODULATOR
LOOP
S2
L
100k
= 2 and the
R
C
R
C
L_DCR
F2
ESR
O
ISL6252, ISL6252A
R
F2
1M
R
duty cycle is 50% then the adapter current loop gain will be
identical to the gain in Figure 20.
A filter should be added between R
reduce switching noise. The filter roll off frequency should be
between the crossover frequency and the switching
frequency (~100kHz).
Voltage Control Loop
When the battery is charged to the voltage set by CELLS and
VADJ the voltage error amplifier (gm1) takes control of the
output (assuming that the adapter current is below the limit set
by ACLIM). The voltage error amplifier (gm1) discharges the
capacitor on VCOMP to limit the output voltage. The current to
the battery decreases as the cells charge to the fixed voltage
and the voltage across the internal battery resistance
decreases. As battery current decreases the 2 current error
amplifiers (gm2 and gm3) output their maximum current and
charge the capacitor on ICOMP to its maximum voltage
(limited to 1.2V above VCOMP). With high voltage on ICOMP,
the minimum voltage buffer output equals the voltage on
VCOMP. The voltage control loop is shown in Figure 22.
.
Output LC Filter Transfer Functions
The gain from the phase node to the system output and
battery depend entirely on external components. Typical
output LC filter response is shown in Figure 23. Transfer
function A
A
ω
LC
ESR
VCOMP
C
R
=
VCOMP
VCOMP
=
---------------------------------------------------------- -
⎛
⎜
⎝
----------- -
ω
-------------------------------- -
(
s
Σ
DP
R
2
LC
ESR
FIGURE 22. VOLTAGE CONTROL LOOP
⎛
⎝
(s) is shown in Equation 36:
+
1
1
------------------------ -
(
–
11
ω
⋅
---------------
ω
2.1V
0.25
gm1
LC
C
ESR
s
s
o
+
-
-
+
)
⋅
PHASE
Q
⎞
⎠
+
-
)
+
ω
1
R
CA2
⎞
⎟
⎠
LC
FET
R4
20
=
R3
_r
DS(ON)
+
-
----------------------- -
(
L C
S1
1
⋅
CSOP
CSON
and CSIP and CSIN to
o
L
)
R
Q
L_DCR
C F2
R
C
ESR
O
=
R
August 25, 2010
R
F2
o
(EQ. 36)
⋅
FN6498.3
R
R
------ -
C
S2
L
BAT
o