ISL88731HRZ Intersil, ISL88731HRZ Datasheet - Page 22
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ISL88731HRZ
Manufacturer Part Number
ISL88731HRZ
Description
IC BATT CHRGR SMBUS LVL2 28-TQFN
Manufacturer
Intersil
Datasheet
1.ISL88731HRZ.pdf
(23 pages)
Specifications of ISL88731HRZ
Function
Charge Management
Battery Type
Lithium-Ion (Li-Ion)
Voltage - Supply
8 V ~ 26 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
28-TQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ISL88731HRZ
Manufacturer:
INTERSIL
Quantity:
14
Part Number:
ISL88731HRZ
Manufacturer:
INTERSIL
Quantity:
20 000
Place the components in such a way that the area under the
IC has less noise traces with high dv/dt and di/dt, such as
gate signals and phase node signals.
Signal Ground and Power Ground Connection
At minimum, a reasonably large area of copper, which will
shield other noise couplings through the IC, should be used
as signal ground beneath the IC. The best tie-point between
the signal ground and the power ground is at the negative
side of the output capacitor on each side, where there is little
noise; a noisy trace beneath the IC is not recommended.
GND and VCC Pin
At least one high quality ceramic decoupling capacitor
should be used to cross these two pins. The decoupling
capacitor can be put close to the IC.
LGATE Pin
This is the gate drive signal for the bottom MOSFET of the
buck converter. The signal going through this trace has both
high dv/dt and high di/dt, and the peak charging and
discharging current is very high. These two traces should be
short, wide, and away from other traces. There should be no
other traces in parallel with these traces on any layer.
PGND Pin
PGND pin should be laid out to the negative side of the
relevant output capacitor with separate traces. The negative
side of the output capacitor must be close to the source node
of the bottom MOSFET. This trace is the return path of
LGATE.
PHASE Pin
This trace should be short, and positioned away from other
weak signal traces. This node has a very high dv/dt with a
voltage swing from the input voltage to ground. No trace
should be in parallel with it. This trace is also the return path
for UGATE. Connect this pin to the high-side MOSFET
source.
UGATE Pin
This pin has a square shape waveform with high dv/dt. It
provides the gate drive current to charge and discharge the
top MOSFET with high di/dt. This trace should be wide,
short, and away from other traces, similar to the LGATE.
BOOT Pin
This pin’s di/dt is as high as the UGATE; therefore, this trace
should be as short as possible.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
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22
ISL88731
CSOP, CSON, CSSP and CSSN Pins
Accurate charge current and adapter current sensing is
critical for good performance. The current sense resistor
connects to the CSON and the CSOP pins through a low
pass filter with the filter capacitor very near the IC (see
Figure 2). Traces from the sense resister should start at the
pads of the sense resister and should be routed close
together, through the low pass filter and to the CSOP and
CSON pins (see Figure 26). The CSON pin is also used as
the battery voltage feedback. The traces should be routed
away from the high dv/dt and di/dt pins like PHASE, BOOT
pins. In general, the current sense resistor should be close
to the IC. These guidelines should also be followed for the
adapter current sense resister and CSSP and CSSN. Other
layout arrangements should be adjusted accordingly.
DCIN Pin
This pin connects to AC-adapter output voltage, and should
be less noise sensitive.
Copper Size for the Phase Node
The capacitance of PHASE should be kept very low to
minimize ringing. It would be best to limit the size of the
PHASE node copper in strict accordance with the current
and thermal management of the application.
Identify the Power and Signal Ground
The input and output capacitors of the converters, the source
terminal of the bottom switching MOSFET PGND should
connect to the power ground. The other components should
connect to signal ground. Signal and power ground are tied
together at one point.
Clamping Capacitor for Switching MOSFET
It is recommended that ceramic capacitors be used closely
connected to the drain of the high-side MOSFET, and the
source of the low-side MOSFET. This capacitor reduces the
noise and the power loss of the MOSFET.
C U R R E N T
T R A C E
H I G H
FIGURE 26. CURRENT SENSE RESISTOR LAYOUT
T O T H E L O W P A S S F I L T E R A N D
K E L V I N C O N N E C T I O N T R A C E S
C S O P A N D C S O N
R E S I S T O R
S E N S E
C U R R E N T
T R A C E
February 8, 2011
H I G H
FN9258.2