DS2740U+ Maxim Integrated Products, DS2740U+ Datasheet - Page 13

• Manufacturer Part Number: DS2740U+
• Description: IC CURRENT GAUGE(15BIT) 8UMAX
• Manufacturer: Maxim Integrated Products

Specifications of DS2740U+

• Function: Current Gauge (15 Bit)
• Voltage - Input: 2.7 ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Battery Type: Li-Ion, NiMH
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Charge Safety Timers: No
• Mounting Style: SMD/SMT
• Temperature Monitoring: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Accuracy: -
• Sensing Method: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 4. FUNCTION COMMANDS
1-Wire SIGNALING
The 1-Wire bus requires strict signaling protocols to ensure data integrity. The four protocols used by the
DS2740 are as follows: the initialization sequence (reset pulse followed by presence pulse), write 0, write
1, and read data. All of these types of signaling except the presence pulse are initiated by the bus master.
The initialization sequence required to begin any communication with the DS2740 is shown in Figure 11.
A presence pulse following a reset pulse indicates that the DS2740 is ready to accept a net address
command. The bus master transmits (Tx) a reset pulse for t
goes into Receive mode (Rx). The 1-Wire bus line is then pulled high by the pullup resistor. After
detecting the rising edge on the DQ pin, the DS2740 waits for t
for t
Figure 11. 1-Wire INITIALIZATION SEQUENCE
WRITE-TIME SLOTS
A write-time slot is initiated when the bus master pulls the 1-Wire bus from a logic-high (inactive) level
to a logic-low level. There are two types of write-time slots: write 1 and write 0. All write-time slots must
be t
1-Wire bus line between 15
the line is high when sampled, a write 1 occurs. If the line is low when sampled, a write 0 occurs (see
Figure 12). For the bus master to generate a write 1 time slot, the bus line must be pulled low and then
released, allowing the line to be pulled high within 15
write-time slot. For the host to generate a write 0 time slot, the bus line must be pulled low and held low
for the duration of the write-time slot.
COMMAND
Read Data
Write Data
SLOT
PDL
DQ
.
in duration with a 1
Writes data to memory
LINE TYPE LEGEND:
starting at address XX
memory starting at
DESCRIPTION
Reads data from
address XX
t
RSTL
BUS MASTER ACTIVE LOW
BOTH BUS MASTER AND
DS2740 ACTIVE LOW
μ
μ
s minimum recovery time, t
s and 60
t
PDH
μ
s (between 2
PROTOCOL
COMMAND
6Ch, XX
69h, XX
13 of 16
μ
s and 6
μ
REC
t
s (2
PDL
RSTL
, between cycles. The DS2740 samples the
μ
μ
s for overdrive speed) after the line falls. If
AFTER COMMAND
s for overdrive speed) after the start of the
DS2740 ACTIVE LOW
RESISTOR PULLUP
. The bus master then releases the line and
PDH
t
RSTH
BUS STATE
PROTOCOL
Master Rx
Master Tx
and then transmits the presence pulse
Up to 256 bytes
Up to 256 bytes
BUS DATA
of data
of data
PACK+
PACK-