LTC4252A-1CMS#TRPBF Linear Technology, LTC4252A-1CMS#TRPBF Datasheet - Page 31
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LTC4252A-1CMS#TRPBF
Manufacturer Part Number
LTC4252A-1CMS#TRPBF
Description
IC CNTRLR HOTSWAP NEGVOLT 10MSOP
Manufacturer
Linear Technology
Type
Hot-Swap Controllerr
Specifications of LTC4252A-1CMS#TRPBF
Applications
General Purpose
Internal Switch(s)
No
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
Family Name
LTC4252A-1
Package Type
MSOP
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Product Depth (mm)
3mm
Product Height (mm)
0.86mm
Product Length (mm)
3mm
Mounting
Surface Mount
Pin Count
10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIO S I FOR ATIO
At power-up, Q5 and Q8 are held off low by the SS pin of
the LTC4252; resistors R5 and R8 pull the SENSE pin
closed to V
lower voltage through the body diodes Q2 or Q3 until Q2
or Q3 is turned on. This allows the LTC4252 to perform a
start-up cycle and ramp up the SS and GATE voltage.
As the SS voltage ramps up to 2.2V, it turns on Q5 and Q8
and pulls TIMER low through Q6 and Q9. The sense
voltage rises as current flows into R5 and R8 through
EE
. V
EE
(SHORT PIN)
(SHORT PIN)
(LONG PIN)
(LONG PIN)
–48V RTN
–48V RTN
–48V RTN
–48V RTN
is connected to the power supply with
U
–48V
–48V
*MOC207
30.1k
30.1k
390k
390k
U
1%
1%
1%
1%
R1
R2
R1
R2
*MOC207
Figure 20. Circuit Breaker with Foldback Current Limit Application
Figure 21. Inrush Control Without a Sense Resistor Application
C1
10nF
C1
10nF
W
C
0.68µF
C
0.68µF
T
T
10
10
8
9
3
8
9
3
OV
TIMER
UV
SS
OV
UV
TIMER
C
68nF
SS
C
68nF
SS
SS
U
LTC4252A-1
LTC4252A-1
V
V
V
V
EE
IN
EE
IN
1
5
5
1
R
3× 1.8k
1/4W EACH
R
3× 1.8k
1/4W EACH
IN
IN
PWRGD
PWRGD
DRAIN
SENSE
SENSE
DRAIN
GATE
GATE
resistors R3 and R6. The ACL amplifier of the LTC4252
servos the sense voltage to about 100mV as the GATE
voltage regulates Q2 and Q3. Current flows into R4, Q4 and
R7, Q7 as Q2 and Q3 turn on. The respective node voltages
at the R3 and R4 connection and the R6 and R7 connection
are always kept equal to their respective sense voltages by
the Q4 and Q2 V
assuming the Q5 and Q8 V
2
7
6
4
2
7
6
4
C
1µF
C
1µF
IN
LTC4252A-1/LTC4252A-2
IN
R
R
R3
5.1k
D
R3
5.1k
D
R
10Ω
LTC4252-1/LTC4252-2
1M
C
C
10nF
1M
C3
330nF
25V
C
*
*
DS
V
R4
38.3k
V
R4
1k
1%
R5 27Ω
drop and the Q7 and Q3 V
OUT
OUT
C2
10nF
100V
+
+
DS
C
100µF
C
100µF
drop is negligible.
L
Q1
IRF530S
4252-1/2 F20
4252-1/2 F21
L
Q1
IRF530S
R
0.02Ω
S
EN
LOAD
EN
LOAD
DS
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