LTC4252A-2IMS Linear Technology, LTC4252A-2IMS Datasheet
LTC4252A-2IMS
Specifications of LTC4252A-2IMS
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LTC4252A-2IMS Summary of contents
Page 1
... MOSFET drain voltage, keeping the MOSFET within its safe operating area (SOA). An adjustable soft- start circuit controls MOSFET inrush current at start-up. The LTC4252-1/LTC4252A-1 latch off after a circuit breaker fault times out. The LTC4252-2 provides automatic retry after a fault. The LTC4252A-1/LTC4252A-2 feature tight ± ...
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... Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300° TIMER UV/OV DRAIN GATE ORDER PART NUMBER LTWM LTC4252-1CMS LTWP LTC4252-2CMS LTRQ LTC4252A-1CMS LTRR LTC4252A-2CMS LTC4252-1IMS LTC4252-2IMS LTC4252A-1IMS LTC4252A-2IMS (Note 1) EE TOP VIEW TIMER IN PWRGD SENSE 4 7 DRAIN ...
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... Low-to-High Transition ● ● ( for LTC4252A Only) ● 5.85 6.15 6.45 ● 5.25 5.55 5.85 ● Low-to-High Transition ● ● ( for LTC4252A Only) ● 4V 50mV SENSE ● LTC4252-1/-2 LTC4252A-1/-2 TYP MAX MIN TYP MAX UNITS 13 14.5 11 ...
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... DRN TMR Timer Off (Circuit Breaker/ Shutdown Cooling, Sinking TMR = 0µA)] Timer On (Circuit Breaker with DRN I = 50µA) DRN For PWRGD Status (MS Only (4V for LTC4252A) DRAIN I = 50µA DRN I = 1.6mA (MS Only 5mA (MS Only (Sourcing) (MS Only) PWRGD SS pin floating, V ramps from SS 0 ...
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... V (V) IN 4252-1/2 G02 Circuit Breaker Current Limit Voltage V vs Temperature –55 –35 – 105 125 25 65 TEMPERATURE (°C) 4252-1/2 G07 LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A Temperature 2mA –55 –35 – 105 125 TEMPERATURE (°C) 4252-1/2 G03 Undervoltage Lockout V LKO vs Temperature 12.0 11.5 11.0 10.5 10 ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A TYPICAL PERFOR A CE CHARACTERISTICS V vs Temperature SS 2.40 2.35 2.30 2.25 2.20 2.15 2.10 2.05 2.00 –55 –35 – 105 125 TEMPERATURE (°C) 4252-1/2 G26 V vs Temperature OS 11.0 10.8 10.6 10.4 10.2 10.0 9.8 9.6 9.4 9.2 9.0 –55 –35 –15 ...
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... V TMRL 1.0 0.5 0 –55 –35 – 105 125 25 65 TEMPERATURE (°C) 4252-1/2 G19 LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A Temperature GATEL 0.8 UV/ TIMER = 0V 0.7 GATE THRESHOLD BEFORE RAMP-UP 0.6 0.5 0.4 0.3 0.2 0.1 0 –55 –35 – 105 125 ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A TYPICAL PERFOR A CE CHARACTERISTICS I (Circuit Breaker, Sourcing) TMR vs Temperature 280 TIMER = 0µA DRN 260 240 220 200 180 –55 –35 – 105 125 TEMPERATURE (°C) 4252-1/2 G22 TMR DRN 10 1 0.1 0.001 0.01 0 (mA) DRN 4252-1/2 G33 V vs Temperature DRNL 2 ...
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... IN 1.4V for the LTC4252A). This corresponds to an analog current limit SENSE voltage of 100mV (60mV for the LTC4252A). If the SS capacitor is omitted, the SS pin ramps up in about 180µs. The SS pin is pulled low under any of the following conditions: in UVLO undervolt- age condition overvoltage condition, during the initial timing cycle or when the circuit breaker fault times out ...
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... TIMER pull low rises above 3.225V, this initiates an initial timing cycle followed by GATE start-up. The (UVLO), UV, OV, IN LTC4252A UV pin is set at 3.08V with 324mV hysteresis < 2.756V, PWRGD pulls high, both GATE and TIMER pull low rises above 3.08V, this initiates an initial timing cycle followed by GATE start-up. The internal UVLO at V always overrides UV ...
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... EE (2.5k *OV AND UV ARE TIED TOGETHER ON THE MS8 PACKAGE. OV AND UV ARE SEPARATE PINS ON THE MS PACKAGE ** ONLY AVAILABLE IN THE MS PACKAGE FOR COMPONENTS, CURRENT AND VOLTAGE WITH TWO VALUES, VALUES IN PARENTHESES REFER TO THE LTC4252A. VALUES WITHOUT PARENTHESES REFER TO THE LTC4252 LTC4252A-1/LTC4252A-2 – 2.385V V IN 58µ ...
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... MOSFET switch (see Figure 1). Both inrush control and short-circuit pro- tection are provided by the MOSFET. A detailed schematic for the LTC4252A is shown in Fig- ure 2. – 48V and – 48RTN receive power through the longest connector pins and are the first to connect when the board is inserted ...
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... There are three distinct thresholds at SENSE: S 50mV for a timed circuit breaker function; 100mV for an analog current limit loop (60mV for the LTC4252A); and 200mV for a fast, feedforward comparator which limits peak current in the event of a catastrophic short-circuit. If, owing to an output overload, the voltage drop across R exceeds 50mV, TIMER sources 230µ ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A APPLICATIO S I FOR ATIO SHUNT REGULATOR A fast responding regulator shunts the LTC4252 V Power is derived from – 48RTN by an external current limiting resistor. The shunt regulator clamps 1µF decoupling capacitor transients and contributes a short delay at start-up. R should be chosen to accommodate both V rent and the drive required for an optocoupler if the PWRGD function on the 10-pin MS package is used ...
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... The R1-R2 divider values shown in Figure 2 set a standing current of slightly more than 100µA and define an imped- ance at UV/OV of 28kΩ. In most applications, 28kΩ impedance coupled with 324mV UV hysteresis makes the LTC4252A insensitive to noise. If more noise immunity is desired, add a 1nF to 10nF filter capacitor from UV/ ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A APPLICATIO S I FOR ATIO Overvoltage conditions detected by the OV comparator will also pull GATE low, thereby shutting down the load. However, it will not reset the circuit breaker TIMER, PWRGD flag or shutdown cooling timer. Returning the supply voltage to an acceptable range restarts the GATE pin if all the interlock conditions except TIMER are met ...
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... Unduly long soft-start intervals can exceed the MOSFET’s SOA rating if powering up into an active load floats, an internal current source ramps SS from • D – 5.8] 2.2V for the LTC4252 1.4V for the LTC4252A in about 230µs. Connecting an external capacitor ground modifies the ramp to approximate an RC response of: ...
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... Each of these three measures the potential of SENSE relative to V SENSE exceeds 50mV, the CB comparator activates the 230µA TIMER pull-up. At 100mV (60mV for the LTC4252A), the ACL amplifier servos the MOSFET current and, at 200mV, the FCL comparator abruptly pulls GATE low in an attempt to bring the MOSFET current under control ...
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... The maximum current flowing in the DRAIN pin is given by: is calculated and S I DRN MAX ( LTC4252-1/LTC4252-2 and C . The circuit breaker should be set to accommodate MIN ( ) I L MAX ( ) = 40mV (45mV for LTC4252A) represents is 54mV to 66mV for ACL . The minimum inrush current This gives ACL 120 must be selected based on the • ...
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... I SUMMARY OF DESIGN FLOW DRN MAX ( ) (13) To summarize the design flow, consider the application shown in Figure 2 with the LTC4252A. It was designed for 80W. and SUPPLY(MAX) Calculate the maximum load current: 80W/43V = 1.86A; allowing for 83% converter efficiency, I Calculate R = SUPPLY(MAX) Calculate I ...
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... TIMING WAVEFORMS System Power-Up Figure 9 details the timing waveforms for a typical power- up sequence in the case where a board is already installed in the backplane and system power is applied abruptly. At LTC4252A-1/LTC4252A TRACK WIDTH W: 0.03" PER AMP COPPER 8000 4252-1/2 F07 Figure 8 ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A APPLICATIO S I FOR ATIO V CLEARS V IN LKO 1 2 GND – (–48RTN) – (–48V) UV/ LKO IN TIMER GATE V GATEL SS SENSE V OUT DRAIN PWRGD Figure 9. System Power-Up Timing (All Waveforms are Referenced time point 8, the load current falls and the SENSE voltage drops below V (t) ...
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... SS control level and the analog current limit loop activates. Between time points 6 and 8, the GATE voltage is servoed, the SENSE voltage is regulated at V (t) and soft-start limits the slew rate of the load ACL current. If the SENSE voltage (V SENSE LTC4252A-1/LTC4252A CHECK OV < GATE < SENSE < V UVHI OVHI ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A APPLICATIO S I FOR ATIO Undervoltage Timing In Figure 11 when UV pin drops below V the LTC4252 shuts down with TIMER, SS and GATE all pulling low. If current has been flowing, the SENSE pin voltage decreases to zero as GATE collapses. When UV recovers and clears V (time point 2), an initial timer UVHI cycle begins followed by a GATE start-up cycle ...
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... Figure 12. Undervoltage Timing with an Overvoltage Glitch (All Waveforms are Referenced OVERSHOOTS OVHI OV TIMER GATE V GATEL SS SENSE Figure 13. Overvoltage Timing (All Waveforms are Referenced to V LTC4252A-1/LTC4252A SENSE < < 20 • V GATEL CB AND TIMER ABORTS INITIAL TIMING CYCLE OVHI AND TIMER RESTARTS INITIAL TIMING CYCLE OVLO TIMER CLEARS V TMRL ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A APPLICATIO S I FOR ATIO TMRH 5.8µA TIMER 230µ • I DRN GATE SS V ACL V CB SENSE V OUT DRAIN PWRGD CB FAULT (14a) Momentary Circuit-Breaker Fault Figure 14. Circuit-Breaker Timing Behavior (All Waveforms are Referenced threshold, TIMER is discharged by 5.8µA. In Figure ...
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... I 5.8µA DRN 5.8µA TIMER V TMRL GATE SS SENSE V OUT DRAIN PWRGD CB FAULT Figure 16. Shutdown Cooling Timing Behavior of LTC4252-2 (All Waveforms are Referenced to V LTC4252A-1/LTC4252A SWITCH RESETS LATCHED TIMER SWITCH RELEASES 5.8µA V TMRH 230µ • I 5.8µA DRN V TMRL 58µ ...
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... MOSFET can help T D prevent SOA damage in a low impedance fault condition. Soft-Start If the SS pin is not connected, this pin defaults to a linear voltage ramp, from 0V to 2.2V in about 180µs ( 1.4V in 230µs for the LTC4252A) at GATE start-up TMRH 230µ • I ...
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... A soft-start voltage below V will not activate the circuit CB breaker TIMER. Power Limit Circuit Breaker Figure 19 shows the LTC4252A power limit circuit breaking application. The SENSE pin is modulated by the board supply voltage The zener voltage, V SUPPLY to be the same as the low supply operating voltage 43V ...
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... This setup is suitable only for applications that don’t require short-circut protection from the LTC4252A. Resistor R4 and capacitor C2 act as a feedback network to accurately control the inrush current. The C2 capacitor can be calculated with the following equation: I • ...
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... C1 10nF 10 6 TIMER GATE SENSE V EE 0.68µ 68nF R IN 3× 1.8k 1/4W EACH 1µ LTC4252A PWRGD 9 7 DRAIN UV C1 10nF 10 6 TIMER GATE SENSE V EE 0.68µ 68nF resistors R3 and R6. The ACL amplifier of the LTC4252 servos the sense voltage to about 100mV as the GATE voltage regulates Q2 and Q3 ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A APPLICATIO S I FOR ATIO –48V RTN DIODE-OR CIRCUIT FOR CHANNEL A –48V A R IN2 3× 1.8k IN SERIES 1/4W EACH DIODE-OR CIRCUIT FOR CHANNEL B –48V B R IN3 3× 1.8k IN SERIES 1/4W EACH Hot Swap SECTION R1 420k 7 UV/ TIMER 10nF LTC4252 0.33µF 32 ...
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... 68nF –48V LTC4252A-1/LTC4252A current flow. The sense voltage is lifted up and causes the fast comparator of LTC4252 to trip and pull the GATE low instantly. The channel A supply short will not cause Q3 of channel B diode-OR circuit to turn off. Similarly, when the channel B supply is shorted to the – ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A-2 PACKAGE DESCRIPTIO 5.23 (.206) MIN 0.42 ± 0.038 (.0165 ± .0015) TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) GAUGE PLANE 0.18 (.007) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006" ...
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... LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC4252A-1/LTC4252A Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661) 0.889 ± ...
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... LTC4252-1/LTC4252-2 LTC4252A-1/LTC4252A-2 U TYPICAL APPLICATIO GND GND (SHORT PIN) R1 402k 1% R2 32. 10nF –48V RELATED PARTS PART NUMBER DESCRIPTION LT1640AH/LT1640AL Negative High Voltage Hot Swap Controllers in SO-8 LT1641-1/LT1641-2 Positive High Voltage Hot Swap Controllers in SO-8 LTC1642 Fault Protected Hot Swap Controller LTC4214 Negative Voltage Hot Swap Controller ...