MAX5970ETX+ Maxim Integrated Products, MAX5970ETX+ Datasheet - Page 28

• Manufacturer Part Number: MAX5970ETX+
• Description: IC CTLR HOT-SWAP DUAL 36TQFN
• Manufacturer: Maxim Integrated Products
• Type: Hot-Swap Controllerr

Specifications of MAX5970ETX+

• Applications: General Purpose, PCI Express
• Internal Switch(s): No
• Voltage - Supply: 2.7 V ~ 16 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0V to 16V, Dual Hot-Swap Controller with 10-Bit
Current and Voltage Monitor and 4 LED Drivers
All voltage measurement values are compared with the
contents of minimum- and maximum-value registers,
and if the most recent measurement exceeds the stored
maximum or is less than the stored minimum, the corre-
sponding register is updated with the new value. These
Table 32. ADC Minimum Voltage Conversion Register Format (High-Order Bits)
Table 33. ADC Minimum Voltage Conversion Register Format (Low-Order Bits)
Table 34. ADC Maximum Voltage Conversion Register Format (High-Order Bits)
28
Description:
Register Title:
Register Addresses:
Description:
Register Title:
Register Addresses:
Description:
Register Title:
Register Addresses:
vmax_9
vmin_9
bit 7
_____________________________________________________________________________________
bit 7
R/W
bit 7
R/W
R
Minimum and Maximum Value Detection
vmax_8
vmin_8
R/W
bit 6
bit 6
bit 6
R/W
R
for Voltage Measurement Values
Minimum voltage conversion result, low-order bits [1:0]
min_ch0_mon_lsb
0x0D
Maximum voltage conversion result, high-order bits [9:2]
max_ch0_mon_msb
0x0E
Minimum voltage conversion result, high-order bits [9:2]
min_ch0_mon_msb
0x0C
vmax_7
vmin_7
bit 5
R/W
bit 5
bit 5
R/W
R
vmax_6
vmin_6
bit 4
R/W
bit 4
R/W
bit 4
R
min_ch1_mon_lsb
0x15
min_ch1_mon_msb
0x14
max_ch1_mon_msb
0x12
vmax_5
vmin_5
bit 3
R/W
bit 3
bit 3
R/W
R
peak detection registers are read accessible through the
I
registers are reset to 0x3FF, and the maximum-value
registers are reset to 0x000. These reset values are
loaded upon startup of a channel or at any time as com-
manded by register peak_log_rst (see Table 36).
2
C interface (see Tables 32–35). The minimum-value
vmax_4
vmin_4
bit 2
bit 2
R/W
bit 2
R
R/W
vmax_3
vmin_1
bit 1
R/W
vmin_3
bit 1
R/W
bit 1
R/W
vmax_2
vmin_0
vmin_2
bit 0
R/W
R/W
bit 0
bit 0
R/W
VALUE
RESET
VALUE
RESET
VALUE
RESET
0x00
0xFF
0x03