MAX5970ETX+ Maxim Integrated Products, MAX5970ETX+ Datasheet - Page 40

• Manufacturer Part Number: MAX5970ETX+
• Description: IC CTLR HOT-SWAP DUAL 36TQFN
• Manufacturer: Maxim Integrated Products
• Type: Hot-Swap Controllerr

Specifications of MAX5970ETX+

• Applications: General Purpose, PCI Express
• Internal Switch(s): No
• Voltage - Supply: 2.7 V ~ 16 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The send byte protocol allows the master device to send
one byte of data to the slave device (see Figure 9). The
send byte presets a register pointer address for a sub-
sequent read or write. The slave sends a NACK instead
of an ACK if the master tries to send an address that is
not allowed. If the master sends a STOP condition, the
internal address pointer does not change. The send byte
procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit data byte.
5) The addressed slave asserts an ACK on SDA.
6) The master sends a STOP condition.
The write byte/word protocol allows the master device
to write a single byte in the register bank or to write to a
series of sequential register addresses. The write byte
procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a write
3) The addressed slave asserts an ACK on SDA.
4) The master sends an 8-bit command code.
5) The addressed slave asserts an ACK on SDA.
6) The master sends an 8-bit data byte.
7) The addressed slave asserts an ACK on SDA.
8) The addressed slave increments its internal address
9) The master sends a STOP condition or repeats steps
0V to 16V, Dual Hot-Swap Controller with 10-Bit
Current and Voltage Monitor and 4 LED Drivers
40
bit (low).
bit (low).
pointer.
6, 7, and 8.
_____________________________________________________________________________________
Write Byte
Send Byte
To write a single byte to the register bank, only the 8-bit
command code and a single 8-bit data byte are sent.
The data byte is written to the register bank if the com-
mand code is valid.
The slave generates a NACK at step 5 if the command
code is invalid. The command code must be in the range
of 0x00 to 0x45. The internal address pointer returns
to 0x00 after incrementing from the highest register
address.
The receive byte protocol allows the master device to
read the register content of the MAX5970 (see Figure 9).
The EEPROM or register address must be preset with a
send byte protocol first. Once the read is complete, the
internal pointer increases by one. Repeating the receive
byte protocol reads the contents of the next address.
The receive byte procedure follows:
1) The master sends a START condition.
2) The master sends the 7-bit slave address and a read
3) The addressed slave asserts an ACK on SDA.
4) The slave sends 8 data bits.
5) The slave increments its internal address pointer.
6) The master asserts an ACK on SDA and repeats
The internal address pointer returns to 0x00 after incre-
menting from the highest register address.
bit (high).
steps 4 and 5 or asserts a NACK and generates a
STOP condition.
Receive Byte