MIC2591B-2BTQ TR Micrel Inc, MIC2591B-2BTQ TR Datasheet - Page 26
![IC PCI HOT PLUG CTLR DUAL 48TQFP](/photos/6/84/68454/576-48-tqfp_sml.jpg)
MIC2591B-2BTQ TR
Manufacturer Part Number
MIC2591B-2BTQ TR
Description
IC PCI HOT PLUG CTLR DUAL 48TQFP
Manufacturer
Micrel Inc
Type
Hot-Swap Controllerr
Datasheet
1.MIC2591B-2YTQ.pdf
(34 pages)
Specifications of MIC2591B-2BTQ TR
Applications
General Purpose, PCI Express
Internal Switch(s)
No
Voltage - Supply
3.3V, 12V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
MIC2591B-2BTQTR
MIC2591B-2BTQTR
MIC2591B-2BTQTR
Control Register, Slot B (CNTRLB)
8-Bits, Read/Write
The power-up default value is 00
Notes:
1.
2.
March 2005
/FORCE_B
/FORCE_B
/FORCE_B
/FORCE_B
MAINBPG
MAINBPG
MAINBPG
MAINBPG
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
AUXBPG
ENABLE
ENABLE
ENABLE
ENABLE
VAUXB
VAUXB
VAUXB
VAUXB
MAINB
MAINB
MAINB
MAINB
The state of the /PWRGDB pin is the logical AND of the values of the AUXBPG and the MAINBPG bits, except when /FORCE_ONB is asserted. If
/FORCE_ONB is asserted (the pin is pulled low), and /FORCE_BENABLE is set to a logic zero, the /PWRGDB pin will be unconditionally forced to
its open-drain (“Power Not Good”) state.
The values of the MAINBPG and AUXBPG register bits are not affected by /FORCE_ONB, but will instead continue to read as high if power is
“Good,” and as low if the conditions which indicate that power is good are not met.
Bit(s)
Bit(s)
Bit(s)
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[7]
D[5]
D[5]
D[5]
D[5]
D[4]
D[4]
D[4]
D[4]
D[3]
D[3]
D[3]
D[3]
Power-Up Default Value:
Power-Up Default Value:
Command_Byte Value (R/W):
AUX output power-good status, Slot B
AUX output power-good status, Slot B
AUX output power-good status, Slot B
AUX output power-good status, Slot B
MAIN output power-good status, Slot B
MAIN output power-good status, Slot B
MAIN output power-good status, Slot B
MAIN output power-good status, Slot B
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Allows or inhibits the operation of the /FORCE_ONB
Allows or inhibits the operation of the /FORCE_ONB
Allows or inhibits the operation of the /FORCE_ONB
Allows or inhibits the operation of the /FORCE_ONB
input pin
input pin
input pin
input pin
MAIN enable control, Slot B
MAIN enable control, Slot B
MAIN enable control, Slot B
MAIN enable control, Slot B
VAUX enable control, Slot B
VAUX enable control, Slot B
VAUX enable control, Slot B
VAUX enable control, Slot B
MAINBPG
MAINBPG
MAINBPG
MAINBPG
MAINBPG
MAINBPG
MAINBPG
MAINBPG
MAINBPG
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
D[6]
h
. Slot is disabled upon power-up, i.e., all supply outputs are off.
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
read only
read only
read only
read only
read only
read only
read only
read only
read only
Function
Function
Function
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
D[5]
Control Register, Slot B (CNTRLB)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
read only
read only
read only
read only
read only
read only
read only
read only
read only
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
D[4]
0000 0000
0000 0000
0000 0011
26
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
read-only
b
b
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
D[3]
= 03
= 00
h
h
1 = Power-is-Good
1 = Power-is-Good
1 = Power-is-Good
1 = Power-is-Good
(VAUXB Output is above its UVLO threshold)
(VAUXB Output is above its UVLO threshold)
(VAUXB Output is above its UVLO threshold)
(VAUXB Output is above its UVLO threshold)
1 = Power-is-Good
1 = Power-is-Good
1 = Power-is-Good
1 = Power-is-Good
(MAINB Outputs are above their UVLO
(MAINB Outputs are above their UVLO
(MAINB Outputs are above their UVLO
(MAINB Outputs are above their UVLO
thresholds)
thresholds)
thresholds)
thresholds)
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
Always read as zero
0 = /FORCE_ONB is enabled
0 = /FORCE_ONB is enabled
0 = /FORCE_ONB is enabled
0 = /FORCE_ONB is enabled
1 = /FORCE_ONB is disabled
1 = /FORCE_ONB is disabled
1 = /FORCE_ONB is disabled
1 = /FORCE_ONB is disabled
0 = Off, 1 = On
0 = Off, 1 = On
0 = Off, 1 = On
0 = Off, 1 = On
0 = Off, 1 = On
0 = Off, 1 = On
0 = Off, 1 = On
0 = Off, 1 = On
/FORCE_B
/FORCE_B
/FORCE_B
/FORCE_B
/FORCE_B
/FORCE_B
/FORCE_B
/FORCE_B
/FORCE_B
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
ENABLE
ENABLE
ENABLE
ENABLE
ENABLE
ENABLE
ENABLE
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
D[2]
Operation
Operation
Operation
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
MAINB
D[1]
D[1]
D[1]
D[1]
D[1]
D[1]
D[1]
D[1]
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
read/write
M9999-033105
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
VAUXB
D[0]
D[0]
D[0]
D[0]
D[0]
D[0]
D[0]
D[0]